Commit bc280915 authored by Lovis J.I. Zenz's avatar Lovis J.I. Zenz
Browse files

removed redundant val rotreg

parent 317d1244
Pipeline #1228 passed with stage
in 2 minutes and 4 seconds
......@@ -1873,12 +1873,6 @@ val shfreg = do
return (shiftedoperand {opnd=(register rm), shift=shift})
end
val rotreg = do
shift <- query $shift;
rm <- query $rm;
return (shiftedoperand {opnd=(register rm), shift=shift})
end
# --- operand list/register list subdecoders ---------------------------
val /reglst ['regs:16'] = update@{operands=(decode-registerlist regs)}
......@@ -2413,51 +2407,51 @@ val / ['/cond 011 0 1 0 0 0 /rn /rd /shfregshtp'] = ternop PKH cond rn rd shfreg
### SXTAB
### - Signed Extend and Add Byte
val / ['/cond 011 0 1 0 1 0 /rn-not15 /rd /rotreg'] = ternop SXTAB cond rn rd rotreg
val / ['/cond 011 0 1 0 1 0 /rn-not15 /rd /rotreg'] = ternop SXTAB cond rn rd shfreg
### SXTAB16
### - Signed Extend and Add Byte 16
val / ['/cond 011 0 1 0 0 0 /rn-not15 /rd /rotreg'] = ternop SXTAB16 cond rn rd rotreg
val / ['/cond 011 0 1 0 0 0 /rn-not15 /rd /rotreg'] = ternop SXTAB16 cond rn rd shfreg
### SXTAH
### - Signed Extend and Add Halfword
val / ['/cond 011 0 1 0 1 1 /rn-not15 /rd /rotreg'] = ternop SXTAH cond rn rd rotreg
val / ['/cond 011 0 1 0 1 1 /rn-not15 /rd /rotreg'] = ternop SXTAH cond rn rd shfreg
### SXTB
### - Signed Extend Byte
val / ['/cond 011 0 1 0 1 0 1111 /rd /rotreg'] = ternop SXTB cond r15 rd rotreg
val / ['/cond 011 0 1 0 1 0 1111 /rd /rotreg'] = ternop SXTB cond r15 rd shfreg
### SXTB16
### - Signed Extend Byte 16
val / ['/cond 011 0 1 0 0 0 1111 /rd /rotreg'] = ternop SXTB16 cond r15 rd rotreg
val / ['/cond 011 0 1 0 0 0 1111 /rd /rotreg'] = ternop SXTB16 cond r15 rd shfreg
### SXTH
### - Signed Extend Halfword
val / ['/cond 011 0 1 0 1 1 1111 /rd /rotreg'] = ternop SXTH cond r15 rd rotreg
val / ['/cond 011 0 1 0 1 1 1111 /rd /rotreg'] = ternop SXTH cond r15 rd shfreg
### UXTAB
### - Unsigned Extend and Add Byte
val / ['/cond 011 0 1 1 1 0 /rn-not15 /rd /rotreg'] = ternop UXTAB cond rn rd rotreg
val / ['/cond 011 0 1 1 1 0 /rn-not15 /rd /rotreg'] = ternop UXTAB cond rn rd shfreg
### UXTAB16
### - Unsigned Extend and Add Byte 16
val / ['/cond 011 0 1 1 0 0 /rn-not15 /rd /rotreg'] = ternop UXTAB16 cond rn rd rotreg
val / ['/cond 011 0 1 1 0 0 /rn-not15 /rd /rotreg'] = ternop UXTAB16 cond rn rd shfreg
### UXTAH
### - Unsigned Extend and Add Halfword
val / ['/cond 011 0 1 1 1 1 /rn-not15 /rd /rotreg'] = ternop UXTAH cond rn rd rotreg
val / ['/cond 011 0 1 1 1 1 /rn-not15 /rd /rotreg'] = ternop UXTAH cond rn rd shfreg
### UXTB
### - Unsigned Extend Byte
val / ['/cond 011 0 1 1 1 0 1111 /rd /rotreg'] = ternop UXTB cond r15 rd rotreg
val / ['/cond 011 0 1 1 1 0 1111 /rd /rotreg'] = ternop UXTB cond r15 rd shfreg
### UXTB16
### - Unsigned Extend Byte 16
val / ['/cond 011 0 1 1 0 0 1111 /rd /rotreg'] = ternop UXTB16 cond r15 rd rotreg
val / ['/cond 011 0 1 1 0 0 1111 /rd /rotreg'] = ternop UXTB16 cond r15 rd shfreg
### UXTH
### - Unsigned Extend Halfword
val / ['/cond 011 0 1 1 1 1 1111 /rd /rotreg'] = ternop UXTH cond r15 rd rotreg
val / ['/cond 011 0 1 1 1 1 1111 /rd /rotreg'] = ternop UXTH cond r15 rd shfreg
# --- Parallel addition and Subtraction instructions ------------------
......
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