Commit ff7ec6e1 authored by Julian Kranz's avatar Julian Kranz

X86 RREIL Translator

- Added semantics of: (V)PSRLW, (V)PSRLD, (V)PSRLQ
parent 4d5a6fac
......@@ -396,8 +396,16 @@ main:
#vpsraw $22, %xmm1, %xmm2
#vpsrad %xmm1, %xmm2, %xmm3
psrldq $73, %xmm1
vpsrldq $5, %xmm1, %xmm2
#psrldq $73, %xmm1
#vpsrldq $5, %xmm1, %xmm2
psrlw %mm1, %mm2
psrlw (%rax), %xmm1
psrlw $197, %xmm1
psrld $20, %mm1
psrlq $10, %mm1
vpsrld %xmm1, %xmm2, %xmm3
vpsrlq $33, %xmm1, %xmm2
#vmovd %xmm5, %ebx
......
......@@ -1688,12 +1688,16 @@ end
val sem-psll element-size x = sem-ps-vps-opnd '0' element-size shl x.opnd1 x.opnd1 x.opnd2
val sem-vpsll element-size x = sem-ps-vps-opnd '1' element-size shl x.opnd1 x.opnd2 x.opnd3
val sem-psra element-size x = sem-ps-vps-opnd '0' element-size shrs x.opnd1 x.opnd1 x.opnd2
val sem-vpsra element-size x = sem-ps-vps-opnd '1' element-size shrs x.opnd1 x.opnd2 x.opnd3
val sem-psrldq x = sem-psxldq-vpsxldq-opnd '0' shr x.opnd1 x.opnd1 x.opnd2
val sem-vpsrldq x = sem-psxldq-vpsxldq-opnd '1' shr x.opnd1 x.opnd2 x.opnd3
val sem-psrl element-size x = sem-ps-vps-opnd '0' element-size shr x.opnd1 x.opnd1 x.opnd2
val sem-vpsrl element-size x = sem-ps-vps-opnd '1' element-size shr x.opnd1 x.opnd2 x.opnd3
val ps-push opnd-sz opnd = do
mode64 <- mode64?;
stack-addr-sz <- runtime-stack-address-size;
......
......@@ -1428,10 +1428,10 @@ val semantics insn =
| PSLLW x: sem-psll 16 x
| PSRAD x: sem-psra 32 x
| PSRAW x: sem-psra 16 x
| PSRLD x: sem-undef-arity2 x
| PSRLD x: sem-psrl 32 x
| PSRLDQ x: sem-psrldq x
| PSRLQ x: sem-undef-arity2 x
| PSRLW x: sem-undef-arity2 x
| PSRLQ x: sem-psrl 64 x
| PSRLW x: sem-psrl 16 x
| PSUBB x: sem-undef-arity2 x
| PSUBD x: sem-undef-arity2 x
| PSUBQ x: sem-undef-arity2 x
......@@ -2089,13 +2089,22 @@ val semantics insn =
case v of
VA3 x: sem-vpsra 16 x
end
| VPSRLD x: sem-undef-varity x
| VPSRLD v:
case v of
VA3 x: sem-vpsrl 32 x
end
| VPSRLDQ v:
case v of
VA3 x: sem-vpsrldq x
end
| VPSRLQ x: sem-undef-varity x
| VPSRLW x: sem-undef-varity x
| VPSRLQ v:
case v of
VA3 x: sem-vpsrl 64 x
end
| VPSRLW v:
case v of
VA3 x: sem-vpsrl 16 x
end
| VPSUBB x: sem-undef-varity x
| VPSUBD x: sem-undef-varity x
| VPSUBQ x: sem-undef-varity x
......
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