Commit f608d693 authored by Julian Kranz's avatar Julian Kranz

X86 RREIL Translator

- Added semantics of: (V)PSIGNB, (V)PSIGNW, (V)PSIGND
parent 4cac9140
......@@ -371,7 +371,15 @@ main:
#pshuflw $0xe1, %xmm1, %xmm2
#vpshuflw $0x59, %xmm1, %xmm2
pshufw $0x2d, %mm1, %mm2
#pshufw $0x2d, %mm1, %mm2
psignb %mm1, %mm2
psignb %xmm1, %xmm2
psignw %xmm1, %xmm2
psignd (%rax), %xmm2
vpsignb %xmm1, %xmm2, %xmm3
vpsignw %xmm1, %xmm2, %xmm3
vpsignd %xmm1, %xmm2, %xmm3
#vmovd %xmm5, %ebx
......
......@@ -203,10 +203,10 @@ val sem-bt x modifier = do
offset-ext <- mktemp;
mov offset-real-sz offset-ext offset;
mov (base-sz - offset-real-sz) (at-offset offset-ext offset-real-sz) (imm 0);
shifted <- mktemp;
shr base-sz shifted base (var offset-ext);
cf <- fCF;
mov 1 cf (var shifted);
......@@ -229,13 +229,13 @@ val sem-call x = do
ip-sz <-
#Todo: mode64 => RIP?
#Todo: x.opnd-sz === 64 => RIP?
if x.opnd-sz === 64 then
if x.opnd-sz === 64 then
return 64
else
return 32
;
temp-ip <- mktemp;
ip <- ip-get;
if (near x.opnd1) then do
target <- read-flow ip-sz x.opnd1;
......@@ -269,7 +269,7 @@ val sem-call x = do
temp-ip <- mktemp;
movzx ip-sz temp-ip x.opnd-sz target
end;
call (address ip-sz (var temp-ip))
end
......@@ -353,7 +353,7 @@ val sem-cmps x = do
# ;
# reg0-sem <- return (semantic-register-of reg0);
# reg0-sz <- sizeof1 (REG reg0);
#
#
# #Todo: Fix, use specified segment
# reg0-segment <- segment DS;
# src0 <- read sz (MEM{sz=sz,psz=addr-sz,segment=reg0-segment,opnd=REG reg0});
......@@ -386,7 +386,7 @@ val sem-cmpxchg x = do
sub size difference (var minuend) subtrahend;
emit-sub-sbb-flags size (var difference) (var minuend) subtrahend (imm 0) '1';
zf <- fZF;
_if (/d (var zf)) _then do
dst <- lval size x.opnd1;
......@@ -425,7 +425,7 @@ val sem-cpuid x = do
ebx <- return (semantic-register-of EBX);
ecx <- return (semantic-register-of ECX);
edx <- return (semantic-register-of EDX);
undef eax.size eax;
undef ebx.size ebx;
undef ecx.size ecx;
......@@ -441,7 +441,7 @@ val sem-cwd-cdq-cqo x = do
end
;
src-sem <- return (semantic-register-of src);
temp <- mktemp;
movsx src-sem.size temp 1 (var (at-offset src-sem (src-sem.size - 1)));
......@@ -452,7 +452,7 @@ val sem-cwd-cdq-cqo x = do
| 64: return RDX
end
;
dst-high-sem <- return (semantic-register-of dst-high);
mov dst-high-sem.size dst-high-sem (var temp)
end
......@@ -466,7 +466,7 @@ val sem-dec x = do
temp <- mktemp;
sub sz temp src (imm 1);
emit-sub-sbb-flags sz (var temp) src (imm 1) (imm 0) '0';
write sz dst (var temp)
......@@ -555,7 +555,7 @@ val sem-inc x = do
temp <- mktemp;
add sz temp src (imm 1);
emit-add-adc-flags sz (var temp) src (imm 1) (imm 0) '0';
write sz dst (var temp)
......
......@@ -1598,6 +1598,45 @@ val sem-pshufhw-vpshufhw avx-encoded x = sem-pshuf-vdhwlw avx-encoded 16 64 0 x
val sem-pshuflw-vpshuflw avx-encoded x = sem-pshuf-vdhwlw avx-encoded 16 0 64 x
val sem-pshufw x = sem-pshuf-vdhwlw '0' 16 0 0 x
val sem-psign-vpsign-opnd avx-encoded element-size opnd1 opnd2 opnd3 = do
size <- sizeof1 opnd1;
src1 <- read size opnd2;
src2 <- read size opnd3;
dst <- lval size opnd1;
temp-src1 <- mktemp;
mov size temp-src1 src1;
temp-src2 <- mktemp;
mov size temp-src2 src2;
temp-dst <- mktemp;
temp <- mktemp;
let
val m i = do
offset <- return (element-size*i);
high-bit-position <- return (offset + element-size - 1);
#movsx element-size temp 1 (var (at-offset temp-src2 high-bit-position));
#mul element-size (at-offset temp-dst offset) (var (at-offset temp-src1 offset)) (var temp)
_if (/d (var (at-offset temp-src2 high-bit-position))) _then
mul element-size (at-offset temp-dst offset) (var (at-offset temp-src1 offset)) (imm (0-1))
_else (_if (/neq element-size (var (at-offset temp-src2 offset)) (imm 0)) _then
mov element-size (at-offset temp-dst offset) (var (at-offset temp-src1 offset))
_else
mov element-size (at-offset temp-dst offset) (imm 0)
)
end
in
vector-apply size element-size m
end;
write-extend avx-encoded size dst (var temp-dst)
end
val sem-psign element-size x = sem-psign-vpsign-opnd '0' element-size x.opnd1 x.opnd1 x.opnd2
val sem-vpsign element-size x = sem-psign-vpsign-opnd '1' element-size x.opnd1 x.opnd2 x.opnd3
val ps-push opnd-sz opnd = do
mode64 <- mode64?;
stack-addr-sz <- runtime-stack-address-size;
......
......@@ -1419,9 +1419,9 @@ val semantics insn =
| PSHUFHW x: sem-pshufhw-vpshufhw '0' x
| PSHUFLW x: sem-pshuflw-vpshuflw '0' x
| PSHUFW x: sem-pshufw x
| PSIGNB x: sem-undef-arity2 x
| PSIGND x: sem-undef-arity2 x
| PSIGNW x: sem-undef-arity2 x
| PSIGNB x: sem-psign 8 x
| PSIGND x: sem-psign 32 x
| PSIGNW x: sem-psign 16 x
| PSLLD x: sem-undef-arity2 x
| PSLLDQ x: sem-undef-arity2 x
| PSLLQ x: sem-undef-arity2 x
......@@ -2053,9 +2053,18 @@ val semantics insn =
case v of
VA3 x: sem-pshuflw-vpshuflw '1' x
end
| VPSIGNB x: sem-undef-varity x
| VPSIGND x: sem-undef-varity x
| VPSIGNW x: sem-undef-varity x
| VPSIGNB v:
case v of
VA3 x: sem-vpsign 8 x
end
| VPSIGND v:
case v of
VA3 x: sem-vpsign 32 x
end
| VPSIGNW v:
case v of
VA3 x: sem-vpsign 16 x
end
| VPSLLD x: sem-undef-varity x
| VPSLLDQ x: sem-undef-varity x
| VPSLLQ x: sem-undef-varity x
......
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