Commit bedfd2ee authored by Julian Kranz's avatar Julian Kranz

X86 RREIL Translator

- Continued to add semantics for: JMP, PUSH, CALL
parent 33b5f4f2
...@@ -448,7 +448,40 @@ val sem-add x = do ...@@ -448,7 +448,40 @@ val sem-add x = do
end end
val sem-call x = do val sem-call x = do
return void target-sz <- sizeof-flow x.opnd1;
target <- read-flow target-sz x.opnd1;
opnd-sz <- static-flow-opnd-sz x.opnd1;
ip-sz <-
if (opnd-sz === 64) then
return 64
else
return 32
;
mode64 <- t-mode64?;
temp-dest <- mktemp;
temp-ip <- mktemp;
if (near x.opnd1) then
if (relative x.opnd1) then
if (opnd-sz === 64) then
do
movsx ip-sz temp-dest target-sz target;
ip <- ip-get;
add ip-sz temp-ip ip (var temp-dest);
ps-push ip-sz ip
end
else
return void
else
return void
else
return void
;
call (address ip-sz (var temp-ip))
end end
val sem-cdqe = do val sem-cdqe = do
...@@ -514,7 +547,8 @@ val sem-jmp x = do ...@@ -514,7 +547,8 @@ val sem-jmp x = do
mov ip-sz temp-ip target mov ip-sz temp-ip target
; ;
if (opnd-sz === 16) then if (opnd-sz === 16) then
andb ip-sz temp-ip (var temp-ip) (imm 0xffff) #andb ip-sz temp-ip (var temp-ip) (imm 0xffff)
mov (ip-sz - opnd-sz) (at-offset temp-ip opnd-sz) (imm 0)
else else
return void return void
end end
...@@ -522,7 +556,8 @@ val sem-jmp x = do ...@@ -522,7 +556,8 @@ val sem-jmp x = do
do do
mov ip-sz temp-ip target; mov ip-sz temp-ip target;
if (opnd-sz === 16) then if (opnd-sz === 16) then
andb ip-sz temp-ip (var temp-ip) (imm 0xffff) #andb ip-sz temp-ip (var temp-ip) (imm 0xffff)
mov (ip-sz - opnd-sz) (at-offset temp-ip opnd-sz) (imm 0)
else else
return void return void
; ;
...@@ -622,29 +657,7 @@ val sem-pop x = do ...@@ -622,29 +657,7 @@ val sem-pop x = do
#Todo: Special actions in protected mode #Todo: Special actions in protected mode
end end
val sem-push x = do val ps-push opnd-sz opnd = do
opnd-sz <- runtime-opnd-sz x.opnd1;
src-size <- sizeof1 x.opnd1;
src <- read src-size x.opnd1;
temp <- mktemp;
case x.opnd1 of
REG r:
if segment-register? r then
movzx opnd-sz temp src-size src
else
mov opnd-sz temp src
| MEM m:
mov opnd-sz temp src
| IMM8 i:
movsx opnd-sz temp src-size src
| IMM16 i:
mov opnd-sz temp src
| IMM32 i:
movsx opnd-sz temp src-size src
end;
mode64 <- t-mode64?; mode64 <- t-mode64?;
stack-addr-sz <- runtime-stack-address-size; stack-addr-sz <- runtime-stack-address-size;
if mode64 then if mode64 then
...@@ -657,7 +670,7 @@ val sem-push x = do ...@@ -657,7 +670,7 @@ val sem-push x = do
else else
sub sp-size sp (var sp) (imm 2) sub sp-size sp (var sp) (imm 2)
; ;
store (address sp-size (var sp)) (lin opnd-sz (var temp)) store (address sp-size (var sp)) (lin opnd-sz (var opnd))
end end
else else
do do
...@@ -675,10 +688,36 @@ val sem-push x = do ...@@ -675,10 +688,36 @@ val sem-push x = do
else else
sub sp-size sp (var sp) (imm 2) sub sp-size sp (var sp) (imm 2)
; ;
store (address sp-size (var sp-seg)) (lin opnd-sz (var temp)) store (address sp-size (var sp-seg)) (lin opnd-sz (var opnd))
end end
end end
val sem-push x = do
opnd-sz <- runtime-opnd-sz x.opnd1;
src-size <- sizeof1 x.opnd1;
src <- read src-size x.opnd1;
temp <- mktemp;
case x.opnd1 of
REG r:
if segment-register? r then
movzx opnd-sz temp src-size src
else
mov opnd-sz temp src
| MEM m:
mov opnd-sz temp src
| IMM8 i:
movsx opnd-sz temp src-size src
| IMM16 i:
mov opnd-sz temp src
| IMM32 i:
movsx opnd-sz temp src-size src
end;
ps-push opnd-sz temp
end
val sem-sal-shl x = do val sem-sal-shl x = do
sz <- sizeof1 x.opnd1; sz <- sizeof1 x.opnd1;
szOp2 <- sizeof1 x.opnd2; szOp2 <- sizeof1 x.opnd2;
...@@ -985,7 +1024,7 @@ val semantics insn = ...@@ -985,7 +1024,7 @@ val semantics insn =
| BTC x: sem-undef-arity2 x | BTC x: sem-undef-arity2 x
| BTR x: sem-undef-arity2 x | BTR x: sem-undef-arity2 x
| BTS x: sem-undef-arity2 x | BTS x: sem-undef-arity2 x
| CALL x: sem-undef-flow1 x | CALL x: sem-call x
| CBW: sem-undef-arity0 | CBW: sem-undef-arity0
| CDQ: sem-undef-arity0 | CDQ: sem-undef-arity0
| CDQE: sem-cdqe | CDQE: sem-cdqe
......
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