Commit b8f04a43 authored by Julian Kranz's avatar Julian Kranz

X86 RREIL Translator

X86 Specification

- Added semantics of: MOVS/MOVSB/MOVSW/MOVSD/MOVSQ
- Bug fixes
parent 0f671620
...@@ -539,11 +539,10 @@ val show/instruction insn = ...@@ -539,11 +539,10 @@ val show/instruction insn =
| MOVNTQ x: "MOVNTQ" -++ show/arity2 x | MOVNTQ x: "MOVNTQ" -++ show/arity2 x
| MOVQ x: "MOVQ" -++ show/arity2 x | MOVQ x: "MOVQ" -++ show/arity2 x
| MOVQ2DQ x: "MOVQ2DQ" -++ show/arity2 x | MOVQ2DQ x: "MOVQ2DQ" -++ show/arity2 x
| MOVSB: "MOVSB" | MOVS x: "MOVS" -++ show/arity2 x
| MOVSD x: "MOVSD" -++ show/varity x | MOVSD x: "MOVSD" -++ show/arity2 x
| MOVSHDUP x: "MOVSHDUP" -++ show/arity2 x | MOVSHDUP x: "MOVSHDUP" -++ show/arity2 x
| MOVSLDUP x: "MOVSLDUP" -++ show/arity2 x | MOVSLDUP x: "MOVSLDUP" -++ show/arity2 x
| MOVSQ: "MOVSQ"
| MOVSS x: "MOVSS" -++ show/arity2 x | MOVSS x: "MOVSS" -++ show/arity2 x
| MOVSW x: "MOVSW" -++ show/arity2 x | MOVSW x: "MOVSW" -++ show/arity2 x
| MOVSX x: "MOVSX" -++ show/arity2 x | MOVSX x: "MOVSX" -++ show/arity2 x
......
...@@ -1209,6 +1209,13 @@ val sem-vmovap x = do ...@@ -1209,6 +1209,13 @@ val sem-vmovap x = do
commit sz dst (var temp) commit sz dst (var temp)
end end
val sem-movs x = do
sz <- sizeof1 x.opnd1;
src <- read sz x.opnd2;
dst <- write sz x.opnd1;
commit sz dst src
end
val sem-movsx x = do val sem-movsx x = do
sz-dst <- sizeof1 x.opnd1; sz-dst <- sizeof1 x.opnd1;
sz-src <- sizeof1 x.opnd2; sz-src <- sizeof1 x.opnd2;
...@@ -2170,11 +2177,10 @@ val semantics insn = ...@@ -2170,11 +2177,10 @@ val semantics insn =
| MOVNTQ x: sem-undef-arity2 x | MOVNTQ x: sem-undef-arity2 x
| MOVQ x: sem-undef-arity2 x | MOVQ x: sem-undef-arity2 x
| MOVQ2DQ x: sem-undef-arity2 x | MOVQ2DQ x: sem-undef-arity2 x
| MOVSB x: sem-undef-arity0 x | MOVS x: sem-movs x
| MOVSD x: sem-undef-varity x | MOVSD x: sem-undef-arity2 x
| MOVSHDUP x: sem-undef-arity2 x | MOVSHDUP x: sem-undef-arity2 x
| MOVSLDUP x: sem-undef-arity2 x | MOVSLDUP x: sem-undef-arity2 x
| MOVSQ x: sem-undef-arity0 x
| MOVSS x: sem-undef-arity2 x | MOVSS x: sem-undef-arity2 x
| MOVSW x: sem-undef-arity2 x | MOVSW x: sem-undef-arity2 x
| MOVSX x: sem-movsx x | MOVSX x: sem-movsx x
......
...@@ -908,11 +908,10 @@ type insn = ...@@ -908,11 +908,10 @@ type insn =
| MOVNTQ of arity2 | MOVNTQ of arity2
| MOVQ of arity2 | MOVQ of arity2
| MOVQ2DQ of arity2 | MOVQ2DQ of arity2
| MOVSB of arity0 | MOVS of arity2
| MOVSD of varity | MOVSD of arity2
| MOVSHDUP of arity2 | MOVSHDUP of arity2
| MOVSLDUP of arity2 | MOVSLDUP of arity2
| MOVSQ of arity0
| MOVSS of arity2 | MOVSS of arity2
| MOVSW of arity2 | MOVSW of arity2
| MOVSX of arity2 | MOVSX of arity2
...@@ -4072,18 +4071,18 @@ val /f3 [0x0f 0xd6 /r-reg] = binop MOVQ2DQ xmm128 mm/reg64 ...@@ -4072,18 +4071,18 @@ val /f3 [0x0f 0xd6 /r-reg] = binop MOVQ2DQ xmm128 mm/reg64
### MOVS/MOVSB/MOVSW/MOVSD/MOVSQ ### MOVS/MOVSB/MOVSW/MOVSD/MOVSQ
### - Move Data from String to String ### - Move Data from String to String
val / [0xa4] = arity0 MOVSB val / [0xa4] = binop MOVS (m/default/si/esi/rsi (return 8)) (m/es/di/edi/rdi (return 8))
val / [0xa5] val / [0xa5]
| opndsz? = arity0 MOVSB | opndsz? = binop MOVS (m/default/si/esi/rsi operand-size) (m/es/di/edi/rdi operand-size)
| rexw? = arity0 MOVSQ | rexw? = binop MOVS (m/default/si/esi/rsi operand-size) (m/es/di/edi/rdi operand-size)
| otherwise = varity0 MOVSD | otherwise = binop MOVS (m/default/si/esi/rsi operand-size) (m/es/di/edi/rdi operand-size)
### MOVSD ### MOVSD
### - Move Scalar Double-Precision Floating-Point Value ### - Move Scalar Double-Precision Floating-Point Value
val /f2 [0x0f 0x10 /r] = varity2 MOVSD xmm128 xmm/m64 val /f2 [0x0f 0x10 /r] = binop MOVSD xmm128 xmm/m64
val /vex/f2/0f/vexv [0x10 /r-reg] = varity3 VMOVSD xmm128 v/xmm xmm/reg128 val /vex/f2/0f/vexv [0x10 /r-reg] = varity3 VMOVSD xmm128 v/xmm xmm/reg128
val /vex/f2/0f [0x10 /r-mem] = varity2 VMOVSD xmm128 m64 val /vex/f2/0f [0x10 /r-mem] = varity2 VMOVSD xmm128 m64
val /f2 [0x0f 0x11 /r] = varity2 MOVSD xmm/m64 xmm128 val /f2 [0x0f 0x11 /r] = binop MOVSD xmm/m64 xmm128
val /vex/f2/0f [0x11 /r-reg] = varity3 VMOVSD xmm/reg128 v/xmm xmm128 val /vex/f2/0f [0x11 /r-reg] = varity3 VMOVSD xmm/reg128 v/xmm xmm128
val /vex/f2/0f [0x11 /r-mem] = varity2 VMOVSD m64 xmm128 val /vex/f2/0f [0x11 /r-mem] = varity2 VMOVSD m64 xmm128
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment