Commit af6ad5b2 authored by Julian Kranz's avatar Julian Kranz

X86 RREIL Translator

- Added semantics of: (V)PSUBUSB, (V)PSUBUSW
- Bug fix
- Cleanup
parent 94b0e8d4
......@@ -412,10 +412,15 @@ main:
#psubd %xmm1, %xmm2
#vpsubd (%rax), %xmm1, %xmm2
psubsb (%rax), %mm1
psubsw (%rax), %xmm1
vpsubsb %xmm1, %xmm2, %xmm3
vpsubsw %xmm1, %xmm2, %xmm3
#psubsb (%rax), %mm1
#psubsw (%rax), %xmm1
#vpsubsb %xmm1, %xmm2, %xmm3
#vpsubsw %xmm1, %xmm2, %xmm3
psubusb (%rax), %mm1
psubusw (%rax), %xmm1
vpsubusb %xmm1, %xmm2, %xmm3
vpsubusw %xmm1, %xmm2, %xmm3
#vmovd %xmm5, %ebx
......
......@@ -452,49 +452,8 @@ val sem-vpadd element-size x = sem-pbinop-opnd '1' element-size add x.opnd1 x.op
val sem-padds element-size x = sem-pbinop-opnd '0' element-size add-signed-saturating x.opnd1 x.opnd1 x.opnd2
val sem-vpadds element-size x = sem-pbinop-opnd '1' element-size add-signed-saturating x.opnd1 x.opnd2 x.opnd3
val sem-paddus-vpaddus-opnd avx-encoded element-size opnd1 opnd2 opnd3 = do
size <- sizeof1 opnd1;
src1 <- read size opnd2;
src2 <- read size opnd3;
dst <- lval size opnd1;
temp-src1 <- mktemp;
mov size temp-src1 src1;
temp-src2 <- mktemp;
mov size temp-src2 src2;
temp-dst <- mktemp;
dst-ex <- mktemp;
src1-ex <- mktemp;
src2-ex <- mktemp;
upper <- return (
if element-size === 8 then
0xff
else
0xffff
);
let
val m i = do
offset <- return (element-size*i);
add (element-size + 1) (at-offset temp-dst offset) (var (at-offset temp-src1 offset)) (var (at-offset temp-src2 offset));
_if (/ltu element-size (var (at-offset temp-dst offset)) (var (at-offset temp-src1 offset))) _then (
mov element-size (at-offset temp-dst offset) (imm upper)
)
end
in
vector-apply size element-size m
end;
write-extend avx-encoded size dst (var temp-dst)
end
val sem-paddus element-size x = sem-paddus-vpaddus-opnd '0' element-size x.opnd1 x.opnd1 x.opnd2
val sem-vpaddus element-size x = sem-paddus-vpaddus-opnd '1' element-size x.opnd1 x.opnd2 x.opnd3
val sem-paddus element-size x = sem-pbinop-opnd '0' element-size add-unsigned-saturating x.opnd1 x.opnd1 x.opnd2
val sem-vpaddus element-size x = sem-pbinop-opnd '1' element-size add-unsigned-saturating x.opnd1 x.opnd2 x.opnd3
val sem-palignr-vpalignr-opnd avx-encoded opnd1 opnd2 opnd3 opnd4 = do
size <- sizeof1 opnd1;
......@@ -1703,6 +1662,9 @@ val sem-vpsub element-size x = sem-pbinop-opnd '1' element-size sub x.opnd1 x.op
val sem-psubs element-size x = sem-pbinop-opnd '0' element-size sub-signed-saturating x.opnd1 x.opnd1 x.opnd2
val sem-vpsubs element-size x = sem-pbinop-opnd '1' element-size sub-signed-saturating x.opnd1 x.opnd2 x.opnd3
val sem-psubus element-size x = sem-pbinop-opnd '0' element-size sub-unsigned-saturating x.opnd1 x.opnd1 x.opnd2
val sem-vpsubus element-size x = sem-pbinop-opnd '1' element-size sub-unsigned-saturating x.opnd1 x.opnd2 x.opnd3
val ps-push opnd-sz opnd = do
mode64 <- mode64?;
stack-addr-sz <- runtime-stack-address-size;
......
......@@ -906,16 +906,16 @@ val binop-signed-saturating operator size dst src1 src2 = do
src2-ex <- mktemp;
upper <- return (
if size === 8 then
0x7f
else
0x7fff
case size of
8: 0x7f
| 16: 0x7fff
end
);
lower <- return (
if size === 8 then
(0-0x80)
else
(0-0x8000)
case size of
8: (0-0x80)
| 16: (0-0x8000)
end
);
movsx (size + 1) src1-ex size src1;
......@@ -934,6 +934,26 @@ end
val add-signed-saturating size dst src1 src2 = binop-signed-saturating add size dst src1 src2
val sub-signed-saturating size dst src1 src2 = binop-signed-saturating sub size dst src1 src2
val binop-unsigned-saturating operator comparer limit size dst src1 src2 = do
operator size dst src1 src2;
_if (comparer size (var dst) src1) _then (
mov size dst (imm limit)
)
end
val add-unsigned-saturating size dst src1 src2 = do
limit <- return (
case size of
8: 0xff
| 16: 0xffff
end
);
binop-unsigned-saturating add /ltu limit size dst src1 src2
end
val sub-unsigned-saturating size dst src1 src2 = binop-unsigned-saturating sub /gtu 0 size dst src1 src2
val semantics insn =
case insn of
AAA x: sem-undef-arity0 x
......@@ -1437,8 +1457,8 @@ val semantics insn =
| PSUBQ x: sem-psub 64 x
| PSUBSB x: sem-psubs 8 x
| PSUBSW x: sem-psubs 16 x
| PSUBUSB x: sem-undef-arity2 x
| PSUBUSW x: sem-undef-arity2 x
| PSUBUSB x: sem-psubus 8 x
| PSUBUSW x: sem-psubus 16 x
| PSUBW x: sem-psub 16 x
| PTEST x: sem-undef-arity2 x
| PUNPCKHBW x: sem-undef-arity2 x
......@@ -2125,8 +2145,14 @@ val semantics insn =
case v of
VA3 x: sem-vpsubs 16 x
end
| VPSUBUSB x: sem-undef-varity x
| VPSUBUSW x: sem-undef-varity x
| VPSUBUSB v:
case v of
VA3 x: sem-vpsubus 8 x
end
| VPSUBUSW v:
case v of
VA3 x: sem-vpsubus 16 x
end
| VPSUBW v:
case v of
VA3 x: sem-vpsub 16 x
......
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment