Commit 6f878277 authored by Julian Kranz's avatar Julian Kranz

X86 RREIL Translator

X86 Specification

- Bug fixes
parent d29b0c34
......@@ -778,8 +778,37 @@ val sem-cmp x = do
emit-sub-sbb-flags sz (var t) b c (imm 0)
end
val sem-cmps sz = do
val sem-cmps x = do
src0-sz <- sizeof1 x.opnd1;
src0 <- read src0-sz x.opnd1;
src1-sz <- sizeof1 x.opnd2;
src1 <- read src1-sz x.opnd2;
temp <- mktemp;
sub sz temp src0 src1;
emit-sub-sbb-flags sz (var temp) src0 src1 (imm 0);
amount <-
case sz of
8: return 1
| 16: return 2
| 32: return 4
| 64: return 8
end
;
df <- fDF;
_if (/not (var df)) _then do
add reg0-sz reg0-sem (var reg0-sem) (imm amount);
add reg1-sz reg1-sem (var reg1-sem) (imm amount)
end _else do
sub reg0-sz reg0-sem (var reg0-sem) (imm amount);
sub reg1-sz reg1-sem (var reg1-sem) (imm amount)
end
return void
# addr-sz <- address-size;
#
# reg0 <-
......@@ -808,32 +837,11 @@ val sem-cmps sz = do
# reg1-segment <- segment ES;
# src1 <- read sz (MEM{sz=sz,psz=addr-sz,segment=reg1-segment,opnd=REG reg1});
#
# temp <- mktemp;
# sub sz temp src0 src1;
# emit-sub-sbb-flags sz (var temp) src0 src1 (imm 0);
#
# amount <-
# case sz of
# 8: return 1
# | 16: return 2
# | 32: return 4
# | 64: return 8
# end
# ;
#
# df <- fDF;
# _if (/not (var df)) _then do
# add reg0-sz reg0-sem (var reg0-sem) (imm amount);
# add reg1-sz reg1-sem (var reg1-sem) (imm amount)
# end _else do
# sub reg0-sz reg0-sem (var reg0-sem) (imm amount);
# sub reg1-sz reg1-sem (var reg1-sem) (imm amount)
# end
end
val sem-cmpsb = sem-cmps 8
val sem-cmpsw = sem-cmps 16
val sem-cmpsd = sem-cmps 32
val sem-cmpsq = sem-cmps 64
#val sem-cmpsb = sem-cmps 8
#val sem-cmpsw = sem-cmps 16
#val sem-cmpsd = sem-cmps 32
#val sem-cmpsq = sem-cmps 64
val sem-hlt = do
......@@ -1659,15 +1667,15 @@ val semantics insn =
| CMP x: sem-cmp x
| CMPPD x: sem-undef-arity3 x
| CMPPS x: sem-undef-arity3 x
| CMPSB: sem-cmpsb
| CMPSD x:
case x of
VA0: sem-cmpsd
| _: sem-undef-varity x
end
| CMPSQ: sem-cmpsq
| CMPS x: sem-cmps x
| CMPSD x: sem-undef-arity3 x
# | CMPSD x:
# case x of
# VA0: sem-cmpsd
# | _: sem-undef-varity x
# end
# | CMPSQ: sem-cmpsq
| CMPSS x: sem-undef-arity3 x
| CMPSW: sem-cmpsw
| CMPXCHG x: sem-undef-arity2 x
| CMPXCHG16B x: sem-undef-arity1 x
| CMPXCHG8B x: sem-undef-arity1 x
......
......@@ -648,7 +648,7 @@ type insn =
| CMPPD of arity3
| CMPPS of arity3
| CMPS of arity2
| CMPSD of varity
| CMPSD of arity3
| CMPSS of arity3
| CMPXCHG of arity2
| CMPXCHG16B of arity1
......@@ -1631,6 +1631,41 @@ val mode32? = do
return (not a)
end
val operand-size = do
#Todo: D flag
mode64 <- mode64?;
opndsz <- opndsz?;
rexw <- rexw?
if mode64 then
if rexw then
return 64
else if opndsz then
return 16
else
return 32
else
if opndsz then
return 16
else
return 32
end
val address-size = do
#Todo: D flag
mode64 <- mode64?;
addrsz <- addrsz?;
if mode64 then
if addrsz then
return 32
else
return 64
else
if addrsz then
return 16
else
return 32
end
## Convert a bit-vectors to registers
val st-reg n =
......@@ -2151,6 +2186,31 @@ val mm64 = r/rexb mm-rex
val xmm128 = r/rexr xmm-rex
val ymm256 = r/rexr ymm-rex
val m/default/si/esi/rsi = do
opndsz <- operand-size;
update@{ptrty=opndsz};
addrsz <- address-size;
update@{ptrsz=addrsz};
case addrsz of
16: mem (REG SI)
| 32: mem (REG ESI)
| 64: mem (REG RSI)
end
end
val m/es/si/esi/rsi = do
update @{segment=SEG_OVERRIDE ES};
opndsz <- operand-size;
update@{ptrty=opndsz};
addrsz <- address-size;
update@{ptrsz=addrsz};
case addrsz of
16: mem (REG SI)
| 32: mem (REG ESI)
| 64: mem (REG RSI)
end
end
val reg = do
r <- query$rexw;
case r of
......@@ -2732,15 +2792,15 @@ val /vex/0f/vexv [0xc2 /r]
### CMPS/CMPSB/CMPSW/CMPSD/CMPSQ
### - Compare String Operands
val / [0xa6] = arity0 CMPSB
val / [0xa6] = binop CMPS m/default/si/esi/rsi m/es/si/esi/rsi
val / [0xa7]
| opndsz? = arity0 CMPSW
| rexw? = arity0 CMPSQ
| otherwise = varity0 CMPSD
| opndsz? = binop CMPS m/default/si/esi/rsi m/es/si/esi/rsi
| rexw? = binop CMPS m/default/si/esi/rsi m/es/si/esi/rsi
| otherwise = binop CMPS m/default/si/esi/rsi m/es/si/esi/rsi
### CMPSD
### - Compare Scalar Double-Precision Floating-Point Values
val /f2 [0x0f 0xc2 /r] = varity3 CMPSD xmm128 xmm/m64 imm8
val /f2 [0x0f 0xc2 /r] = ternop CMPSD xmm128 xmm/m64 imm8
val /vex/f2/0f/vexv [0xc2 /r] = varity4 VCMPSD xmm128 v/xmm xmm/m64 imm8
### CMPSS
......
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