Commit 5f5b628f authored by Benedikt Geßele's avatar Benedikt Geßele

temporary /rs-notnull decoder (gdsl bug), jic implemented

parent c4c78d78
......@@ -236,7 +236,7 @@ val sem-jialc x = do
rt <- rval Signed x.op1;
off <- rval Signed x.op2;
size <- return (sizeof-rval x.op1);
pc <- return (semantic-reg-of Sem_SREG);
pc <- return (semantic-reg-of Sem_PC);
ra <- return (semantic-gpr-of RA);
pc_new <- mktemp;
......@@ -248,6 +248,20 @@ val sem-jialc x = do
jump (address size (var pc_new))
end
val sem-jic x = do
rt <- rval Signed x.op1;
off <- rval Signed x.op2;
size <- return (sizeof-rval x.op1);
pc <- return (semantic-reg-of Sem_PC);
pc_new <- mktemp;
mov size pc_new rt;
add size pc_new (var pc_new) off;
jump (address size (var pc_new))
end
val revision/semantics i =
case i of
ADDIUPC x: sem-addiupc x
......@@ -291,4 +305,5 @@ val revision/semantics i =
| DVP x: sem-default-unop-l-generic i x
| EVP x: sem-default-unop-l-generic i x
| JIALC x: sem-jialc x
| JIC x: sem-jic x
end
......@@ -41,4 +41,5 @@ val revision/traverse f insn =
| DVP x: f "DVP" (UNOP_L x)
| EVP x: f "EVP" (UNOP_L x)
| JIALC x: f "JIALC" (BINOP_RR x)
| JIC x: f "JIC" (BINOP_RR x)
end
......@@ -25,7 +25,6 @@ val bgeuc? s = (not (s.rs == s.rt)) and (not (s.rs == '00000')) and (not (s.rt =
val bltuc? s = (not (s.rs == s.rt)) and (not (s.rs == '00000')) and (not (s.rt == '00000'))
val beqc? s = ((zx s.rs) < (zx s.rt)) and (not (s.rs == '00000')) and (not (s.rt == '00000'))
val bnec? s = ((zx s.rs) < (zx s.rt)) and (not (s.rs == '00000')) and (not (s.rt == '00000'))
val beqzc? s = not (s.rs == '00000')
val bovc? s = ((zx s.rs) >= (zx s.rt))
val bnvc? s = ((zx s.rs) >= (zx s.rt))
......@@ -151,8 +150,7 @@ val / ['000111 /rs /rt /offset16']
### => see BNVC
### BEQZC
val / ['110110 /rs /offset21']
| beqzc? = binop BEQZC (right rs) offset23
val / ['110110 /rs-notnull /offset21'] = binop BEQZC (right rs) offset23
### BNEZC
val / ['111110 /rs-notnull /offset21'] = binop BNEZC (right rs) offset23
......@@ -213,6 +211,10 @@ val / ['010000 01011 /rt 00000 00000 0 00 100'] = unop EVP rt
### - Jump Indexed and Link, Compact
val / ['111110 00000 /rt /offset16'] = binop JIALC (right rt) offset16
### JIC
### - Jump Indexed and Link, Compact
val / ['110110 00000 /rt /offset16'] = binop JIALC (right rt) offset16
### LUI
### - Load Upper Immediate
### => see AUI r0, rt, immediate16
......@@ -260,6 +262,7 @@ type instruction =
| DVP of unop-l
| EVP of unop-l
| JIALC of binop-rr
| JIC of binop-rr
type imm =
IMM21 of 21
......@@ -284,7 +287,6 @@ val /fmt5sd/wl ['10101'] = update@{fmt=D}
val /condn ['condn:5'] = update@{condn=condn}
val /rs-notnull ['rs@00001|00010|00011|00100|00101|00110|00111|01000|01001|01010|01011|01100|01101|01110|01111|10000|10001|10010|10011|10100|10101|10110|10111|11000|11001|11010|11011|11100|11101|11110|11111'] = update@{rs=rs}
###########################
# operand constructors
####
......
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