Commit 5824b285 authored by Axel Simon's avatar Axel Simon
Browse files

merge

parents 1b3aff4c 829896bd
......@@ -26,7 +26,7 @@ type sem_linear =
type sem_op =
SEM_LIN of sem_arity1
| SEM_BSWAP of sem_arity1
| SEM_BSWAP of sem_arity1
| SEM_MUL of sem_arity2
| SEM_DIV of sem_arity2
| SEM_DIVS of sem_arity2
......@@ -47,7 +47,7 @@ type sem_op =
| SEM_CMPLTU of sem_cmp
| SEM_ARB of {size: int}
type sem_stmt =
type sem_stmt =
SEM_ASSIGN of {lhs: sem_var, rhs: sem_op}
| SEM_LOAD of {lhs: sem_var, size: int, address: sem_address}
| SEM_STORE of {address: sem_address, rhs: sem_op}
......@@ -57,7 +57,7 @@ type sem_stmt =
| SEM_CALL of {cond: sem_linear, size:int, target: sem_linear}
| SEM_RETURN of {cond: sem_linear, size:int, target: sem_linear}
type sem_stmts =
type sem_stmts =
SEM_CONS of {hd:sem_stmt, tl:sem_stmts}
| SEM_NIL
......@@ -68,7 +68,7 @@ type sem_writeback =
val rreil-sizeOf op =
case op of
SEM_LIN x: x.size
| SEM_BSWAP x: x.size
| SEM_BSWAP x: x.size
| SEM_MUL x: x.size
| SEM_DIV x: x.size
| SEM_DIVS x: x.size
......
......@@ -391,8 +391,8 @@ val show/instruction insn =
| FNSTENV x: "FNSTENV" -++ show/arity1 x
| FNSTSW x: "FNSTSW" -++ show/arity1 x
| FPATAN: "FPATAN"
| FPREM: "FPREM"
| FPREM1: "FPREM1"
| FPREM: "FPREM"
| FPTAN: "FPTAN"
| FRNDINT: "FRNDINT"
| FRSTOR x: "FRSTOR" -++ show/arity1 x
......@@ -418,10 +418,10 @@ val show/instruction insn =
| FUCOMPP: "FUCOMPP"
| FXAM: "FXAM"
| FXCH x: "FXCH" -++ show/arity1 x
| FXRSTOR64 x: "FXRSTOR64" -++ show/arity1 x
| FXRSTOR x: "FXRSTOR" -++ show/arity1 x
| FXSAVE64 x: "FXSAVE64" -++ show/arity1 x
| FXRSTOR64 x: "FXRSTOR64" -++ show/arity1 x
| FXSAVE x: "FXSAVE" -++ show/arity1 x
| FXSAVE64 x: "FXSAVE64" -++ show/arity1 x
| FXTRACT: "FXTRACT"
| FYL2X: "FYL2X"
| FYL2XP1: "FYL2XP1"
......@@ -434,7 +434,10 @@ val show/instruction insn =
| IMUL x: "IMUL" -++ show/varity x
| IN x: "IN" -++ show/arity2 x
| INC x: "INC" -++ show/arity1 x
| INSB: "INSB"
| INSD: "INSD"
| INSERTPS x: "INSERTPS" -++ show/arity3 x
| INSW: "INSW"
| INT x: "INT" -++ show/arity1 x
| INT0: "INT0"
| INT3: "INT3"
......
......@@ -2,7 +2,7 @@
export = translate
val guess-sizeof dst/src1 src2 =
val guess-sizeof dst/src1 src2 =
case dst/src1 of
REG r: return ($size (semantic-register-of r))
| MEM x: return x.sz
......@@ -25,13 +25,13 @@ val guess-sizeof1 op =
| IMM64 i: return 64
end
val conv-with conv sz x =
val conv-with conv sz x =
let
val conv-imm conv x = return (SEM_LIN_IMM{imm=conv x})
val conv-reg r = return (SEM_LIN_VAR (semantic-register-of r))
val conv-sum conv sz x =
val conv-sum conv sz x =
do op1 <- conv-with conv sz x.a;
op2 <- conv-with conv sz x.b;
return
......@@ -122,7 +122,7 @@ val commit sz a b =
end
| _: mov sz x.id b
end
| _: mov sz x.id b
| _: mov sz x.id b
end
end
......@@ -139,22 +139,51 @@ val fAF = return (var//0 (ARCH_R ~3)) # AF
val zero = return (SEM_LIN_IMM{imm=0})
val undef-opnd opnd = do
sz <- guess-sizeof1 opnd;
a <- write sz opnd;
t <- mktemp;
commit sz a t
end
val sem-undef-arity-ge1 x = do
case x.opnd1 of
REG r: undef-opnd x.opnd1
| MEM x: undef-opnd x.opnd1
end
end
val sem-undef-arity0 x = do
0
end
val sem-undef-arity1 x = do
sem-undef-arity-ge1
end
val sem-undef-arity2 x = do
sem-undef-arity-ge1
end
val sem-undef-arity3 x = do
sem-undef-arity-ge1
end
val sem-undef-arity4 x = do
sem-undef-arity-ge1
end
val sem-undef-varity x = do
case x of
VA1 x: sem-undef-arity1 x
| VA2 x: sem-undef-arity2 x
| VA3 x: sem-undef-arity3 x
| VA4 x: sem-undef-arity4 x
end
end
val sem-undef-flow1 x = do
0
end
val emit-add-flags sz a b c =
......@@ -169,7 +198,7 @@ val emit-add-flags sz a b c =
t2 <- mktemp;
t3 <- mktemp;
zer0 <- zero;
# HACKERS-DELIGHT p27
# HACKERS-DELIGHT p27
# TODO: Compute {ltu} flag
undef 1 ltu;
xorb sz t1 a b;
......@@ -183,7 +212,7 @@ val emit-add-flags sz a b c =
orb 1 les (var lts) (var eq)
end
val emit-sub-flags sz a b c =
val emit-sub-flags sz a b c =
do eq <- fEQ;
les <- fLES;
leu <- fLEU;
......@@ -266,13 +295,13 @@ val sem-shl x = do
convert sz cnt szOp2 c;
andb sz cnt (var cnt) mask;
cmpeq sz cntIsZero (var cnt) zer0;
ifgotolabel (var cntIsZero) nop;
ifgotolabel (var cntIsZero) nop;
shl sz t1 b (/SUB (var cnt) one);
mov 1 cf (var (t1 /+ (sz - 1)));
shl sz t2 b (var cnt);
cmpeq sz cntIsOne (var cnt) one;
ifgotolabel (var cntIsOne) setflag;
undef 1 ov;
undef 1 ov;
gotolabel exit;
label setflag;
xorb 1 ov (var cf) (var (t2 /+ (sz - 1)));
......@@ -298,7 +327,7 @@ val sem-je x = do
sz <- guess-sizeof-flow x.opnd1;
target <- read-flow sz x.opnd1;
eq <- fEQ;
ifgoto (var eq) sz target
ifgoto (var eq) sz target
end
val sem-jb x = do
......@@ -530,8 +559,8 @@ val semantics insn =
| FNSTENV x: sem-undef-arity1 x
| FNSTSW x: sem-undef-arity1 x
| FPATAN: sem-undef-arity0
| FPREM: sem-undef-arity0
| FPREM1: sem-undef-arity0
| FPREM: sem-undef-arity0
| FPTAN: sem-undef-arity0
| FRNDINT: sem-undef-arity0
| FRSTOR x: sem-undef-arity1 x
......@@ -557,10 +586,10 @@ val semantics insn =
| FUCOMPP: sem-undef-arity0
| FXAM: sem-undef-arity0
| FXCH x: sem-undef-arity1 x
| FXRSTOR64 x: sem-undef-arity1 x
| FXRSTOR x: sem-undef-arity1 x
| FXSAVE64 x: sem-undef-arity1 x
| FXRSTOR64 x: sem-undef-arity1 x
| FXSAVE x: sem-undef-arity1 x
| FXSAVE64 x: sem-undef-arity1 x
| FXTRACT: sem-undef-arity0
| FYL2X: sem-undef-arity0
| FYL2XP1: sem-undef-arity0
......@@ -573,7 +602,10 @@ val semantics insn =
| IMUL x: sem-undef-varity x
| IN x: sem-undef-arity2 x
| INC x: sem-undef-arity1 x
| INSB: sem-undef-arity0
| INSD: sem-undef-arity0
| INSERTPS x: sem-undef-arity3 x
| INSW: sem-undef-arity0
| INT x: sem-undef-arity1 x
| INT0: sem-undef-arity0
| INT3: sem-undef-arity0
......@@ -1244,14 +1276,14 @@ val semantics insn =
#s/^ | \([^\s]*\) of varity\s*/ | \1 x: sem-undef-varity x/g
#s/^ | \(\S*\)\s*$/ | \1: sem-undef-arity0/g
val translate insn =
val translate insn =
do update@{stack=SEM_NIL,tmp=0,lab=0};
semantics insn;
stack <- query $stack;
return (rreil-stmts-rev stack)
end
val translate-bottom-up insn =
val translate-bottom-up insn =
do update@{stack=SEM_NIL,tmp=0,lab=0};
semantics insn;
stack <- query $stack;
......
......@@ -65,7 +65,7 @@ end
val continue = do
t <- query$tab;
# make the type checker happy
update@{~tab};
update@{~tab};
# make the type checker happy
r <- t;
update@{~tab};
......@@ -76,7 +76,7 @@ end
# update@{tab=snd};
# fst
# end
#
#
# val continue = do
# t <- query$tab;
# t
......@@ -304,7 +304,9 @@ val p64 [0x66] = do set-opndsz; p/66 end
val p64 [0xf2] = do set-repne; p/f2 end
val p64 [0xf3] = do set-rep; p/f3 end
val p64 [/legacy-p] = p64
val p64 [/rex-p] = p64
val p64 [/rex-p]
| mode64? = p64
| mode32? = unop INC rex/reg32
#val p64 [p/vex/0f] = /vex/0f
val p64 [p/vex/f2/0f] = /vex/f2/0f
val p64 [p/vex/f3/0f] = /vex/f3/0f
......@@ -319,63 +321,81 @@ val p/66 [0xf2] = do set-repne; p/66/f2 end
val p/66 [0xf3] = do set-rep; p/66/f3 end
val p/66 [0x66] = do set-opndsz; p/66 end
val p/66 [/legacy-p] = p/66
val p/66 [/rex-p] = p/66
val p/66 [/rex-p]
| mode64? = p/66
| mode32? = unop INC rex/reg16
val p/66 [] = after /66 /
val p/f2 [0x66] = do set-opndsz; p/66/f2 end
val p/f2 [0xf2] = do set-repne; p/f2 end
val p/f2 [0xf3] = do set-rep; p/f2/f3 end
val p/f2 [/legacy-p] = p/f2
val p/f2 [/rex-p] = p/f2
val p/f2 [] = after /f2 /
val p/f2 [/rex-p]
| mode64? = p/f2
| mode32? = unop INC rex/reg32
val p/f2 [] = after /f2 /
val p/f3 [0x66] = do set-opndsz; p/66/f3 end
val p/f3 [0xf2] = do set-repne; p/f3/f2 end
val p/f3 [0xf3] = do set-rep; p/f3 end
val p/f3 [/legacy-p] = p/f3
val p/f3 [/rex-p] = p/f3
val p/f3 [] = after /f3 /
val p/f3 [/rex-p]
| mode64? = p/f3
| mode32? = unop INC rex/reg32
val p/f3 [] = after /f3 /
val p/f2/f3 [0x66] = do set-opndsz; p/66/f2/f3 end
val p/f2/f3 [0xf2] = do set-repne; p/f3/f2 end
val p/f2/f3 [0xf3] = do set-rep; p/f2/f3 end
val p/f2/f3 [/legacy-p] = p/f2/f3
val p/f2/f3 [/rex-p] = p/f2/f3
val p/f2/f3 [/rex-p]
| mode64? = p/f2/f3
| mode32? = unop INC rex/reg32
val p/f2/f3 [] = after /f3 (after /f2 /)
val p/f3/f2 [0x66] = do set-opndsz; p/66/f2/f3 end
val p/f3/f2 [0xf2] = do set-repne; p/f3/f2 end
val p/f3/f2 [0xf3] = do set-rep; p/f2/f3 end
val p/f3/f2 [/legacy-p] = p/f3/f2
val p/f3/f2 [/rex-p] = p/f3/f2
val p/f3/f2 [/rex-p]
| mode64? = p/f3/f2
| mode32? = unop INC rex/reg32
val p/f3/f2 [] = after /f2 (after /f3 /)
val p/66/f2 [0x66] = do set-opndsz; p/66/f2 end
val p/66/f2 [0xf2] = do set-repne; p/66/f2 end
val p/66/f2 [0xf3] = do set-rep; p/66/f2/f3 end
val p/66/f2 [/legacy-p] = p/66/f2
val p/66/f2 [/rex-p] = p/66/f2
val p/66/f2 [/rex-p]
| mode64? = p/66/f2
| mode32? = unop INC rex/reg16
val p/66/f2 [] = after /f2 (after /66 /)
val p/66/f3 [0x66] = do set-opndsz; p/66/f3 end
val p/66/f3 [0xf2] = do set-repne; p/66/f3/f2 end
val p/66/f3 [0xf3] = do set-rep; p/66/f3 end
val p/66/f3 [/legacy-p] = p/66/f3
val p/66/f3 [/rex-p] = p/66/f3
val p/66/f3 [/rex-p]
| mode64? = p/66/f3
| mode32? = unop INC rex/reg16
val p/66/f3 [] = after /f3 (after /66 /)
val p/66/f2/f3 [0x66] = do clear-rex; p/66/f2/f3 end
val p/66/f2/f3 [0xf2] = do clear-rex; p/66/f3/f2 end
val p/66/f2/f3 [0xf3] = do clear-rex; p/66/f2/f3 end
val p/66/f2/f3 [/legacy-p] = p/66/f2/f3
val p/66/f2/f3 [/rex-p] = p/66/f2/f3
val p/66/f2/f3 [/rex-p]
| mode64? = p/66/f2/f3
| mode32? = unop INC rex/reg16
val p/66/f2/f3 [] = after /f3 (after /f2 (after /66 /))
val p/66/f3/f2 [0x66] = do clear-rex; p/66/f3/f2 end
val p/66/f3/f2 [0xf2] = do clear-rex; p/66/f3/f2 end
val p/66/f3/f2 [0xf3] = do clear-rex; p/66/f2/f3 end
val p/66/f3/f2 [/legacy-p] = p/66/f3/f2
val p/66/f3/f2 [/rex-p] = p/66/f3/f2
val p/66/f3/f2 [/rex-p]
| mode64? = p/66/f3/f2
| mode32? = unop INC rex/reg16
val p/66/f3/f2 [] = after /f2 (after /f3 (after /66 /))
type register =
......@@ -402,35 +422,35 @@ type register =
| R8B
| R8L
| R8D
| R8
| R8
| R9B
| R9L
| R9D
| R9
| R9
| R10B
| R10L
| R10D
| R10
| R10
| R11B
| R11L
| R11D
| R11
| R11
| R12B
| R12L
| R12D
| R12
| R12
| R13B
| R13L
| R13D
| R13
| R13
| R14B
| R14L
| R14D
| R14
| R14
| R15B
| R15L
| R15D
| R15
| R15
| SP
| ESP
| RSP
......@@ -529,9 +549,9 @@ type flowopnd =
type flow1 = {opnd1:flowopnd}
type arity1 = {opnd1:opnd}
type arity2 = {opnd1:opnd,opnd2:opnd}
type arity3 = {opnd1:opnd,opnd2:opnd,opnd3:opnd}
type arity4 = {opnd1:opnd,opnd2:opnd,opnd3:opnd,opnd4:opnd}
type arity2 = {opnd1:opnd,opnd2:opnd}
type arity3 = {opnd1:opnd,opnd2:opnd,opnd3:opnd}
type arity4 = {opnd1:opnd,opnd2:opnd,opnd3:opnd,opnd4:opnd}
type varity =
VA0
......@@ -579,7 +599,7 @@ type insn =
| BTS of arity2
| CALL of flow1
| CBW
| CDQ
| CDQ
| CDQE
| CLC
| CLD
......@@ -759,10 +779,10 @@ type insn =
| FUCOMPP
| FXAM
| FXCH of arity1
| FXRSTOR64 of arity1
| FXRSTOR of arity1
| FXSAVE64 of arity1
| FXRSTOR64 of arity1
| FXSAVE of arity1
| FXSAVE64 of arity1
| FXTRACT
| FYL2X
| FYL2XP1
......@@ -775,7 +795,10 @@ type insn =
| IMUL of varity
| IN of arity2
| INC of arity1
| INSB
| INSD
| INSERTPS of arity3
| INSW
| INT of arity1
| INT0
| INT3
......@@ -1155,7 +1178,7 @@ type insn =
| UNPCKHPD of arity2
| UNPCKHPS of arity2
| UNPCKLPD of arity2
| UNPCKLPS of arity2
| UNPCKLPS of arity2
| VADDPD of varity
| VADDPS of varity
| VADDSD of varity
......@@ -1548,6 +1571,20 @@ val ptr16/32 ['b1:8' 'b2:8' 'b3:8' 'b4:8' 'b5:8' 'b6:8'] = return (PTR16/32 (b6
val imm/xmm ['r:4 b:4'] = return (xmm r)
val imm/ymm ['r:4 b:4'] = return (ymm r)
val rex/reg16 = do
rexr <- query $rexr;
rexx <- query $rexx;
rexb <- query $rexb;
return (reg16 ('0' ^ rexr ^ rexx ^ rexb))
end
val rex/reg32 = do
rexr <- query $rexr;
rexx <- query $rexx;
rexb <- query $rexb;
return (reg32 ('0' ^ rexr ^ rexx ^ rexb))
end
val & giveA giveB = do
a <- giveA;
b <- giveB;
......@@ -1599,7 +1636,7 @@ end
## Convert a bit-vectors to registers
val st-reg n =
val st-reg n =
case n of
'0000': REG ST0
| '0001': REG ST1
......@@ -1833,7 +1870,7 @@ val sib-without-base reg scale index = do
mod <- query $mod;
rexb <- query $rexb;
case mod of
'00':
'00':
do
i <- imm32;
return (SUM{a=scaled, b=i})
......@@ -2167,28 +2204,28 @@ end
val one = return (IMM8 '00000001')
val // a =
val // a =
do b <- a;
return (not b)
end
### AAA
### - ASCII Adjust After Addition
val / [0x37] | mode32? = arity0 AAA
val / [0x37] | mode32? = arity0 AAA
### AAD
### - ASCII Adjust AX Before Division
val / [0xd5] | mode32? = unop AAD imm8
val / [0xd5] | mode32? = unop AAD imm8
### AAM
### - ASCII Adjust AX After Multiply
val / [0xd4] | mode32? = unop AAM imm8
val / [0xd4] | mode32? = unop AAM imm8
### AAS
### - ASCII Adjust AL After Subtraction
val / [0x3f] | mode32? = arity0 AAS
### ADC
### ADC
### - Add with Carry
val / [0x14] = binop ADC al imm8
val / [0x15]
......@@ -2213,7 +2250,7 @@ val / [0x12 /r] = binop ADC r8 r/m8
val / [0x13 /r]
| opndsz? = binop ADC r16 r/m16
| rexw? = binop ADC r64 r/m64
| otherwise = binop ADC r32 r/m32
| otherwise = binop ADC r32 r/m32
### ADD
### - Add
......@@ -2225,7 +2262,7 @@ val / [0x05]
val / [0x80 /0] = binop ADD r/m8 imm8
val / [0x81 /0]
| opndsz? = binop ADD r/m16 imm16
| rexw? = binop ADD r/m64 imm32
| rexw? = binop ADD r/m64 imm32
| otherwise = binop ADD r/m32 imm32
val / [0x83 /0]
| opndsz? = binop ADD r/m16 imm8
......@@ -2367,7 +2404,7 @@ val /vex/0f/vexv [0x55 /r]
### ARPL
### - Adjust RPL Field of Segment Selector
val / [0x63 /r] | mode32? = binop ARPL r/m16 r16
### See MOVSX/MOVSDX
### BLENDPD
### - Blend Packed Double Precision Floating-Point Values
......@@ -2423,7 +2460,7 @@ val / [0x0f /1-reg]
| rexw? = unop BSWAP r/reg64
| otherwise = unop BSWAP r/reg32
#val / [0x0f '11001 r:3']
# | rexw? = do update@{reg/opcode=r}; unop BSWAP r64/rexb end
# | rexw? = do update@{reg/opcode=r}; unop BSWAP r64/rexb end
# | otherwise = do update@{reg/opcode=r}; unop BSWAP r32/rexb end
### BT
......@@ -2489,7 +2526,7 @@ val / [0xff /3-mem]
### CBW/CWDE/CDQE
### - Convert Byte to Word/Convert Word to Doubleword/Convert Doubleword to Quadword
val / [0x98]
val / [0x98]
| opndsz? = arity0 CBW
| rexw? = arity0 CDQE
| otherwise = arity0 CWDE
......@@ -2849,7 +2886,7 @@ val / [0xff /1]
| rexw? = unop DEC r/m64
| otherwise = unop DEC r/m32
val / ['01001 r:3']
| opndsz? & mode32? = do update@{reg/opcode=r}; unop DEC r16 end
| opndsz? & mode32? = do update@{reg/opcode=r}; unop DEC r16 end
| mode32? = do update@{reg/opcode=r}; unop DEC r32 end
### DIV
......@@ -2928,7 +2965,7 @@ val / [0xde /0-mem] = unop FIADD m16
### FBLD
### - Load Binary Coded Decimal
val / [0xdf /4-mem] = unop FBLD m80
val / [0xdf /4-mem] = unop FBLD m80
### FBSTP
### - Store BCD Integer and Pop
......@@ -2956,7 +2993,7 @@ val / [0xdb /3-reg] = binop FCMOVNU st0 st/reg
### FCOM/FCOMP/FCOMPP
### - Compare Floating Point Values
val / [0xd8 /2] = unop FCOM st/m32
val / [0xd8 /2] = unop FCOM st/m32
val / [0xdc /2-mem] = unop FCOM m64
val / [0xd8 /3] = unop FCOMP st/m32
val / [0xdc /3-mem] = unop FCOMP m64
......@@ -3053,7 +3090,7 @@ val / [0xd9 0xee] = arity0 FLDZ