Commit 3f3f78b0 authored by Julian Kranz's avatar Julian Kranz

X86 RREIL Translator

- Added semantics of: (V)PSHUFHW
- Added todo file for GDSL
parent 856361bb
- Pattern matching auf Bitvektoren, z.B.
val shift-left x =
case x of
'xs x:1': '0' ^ xs
end
......@@ -356,12 +356,16 @@ main:
#vpsadbw %xmm1, %xmm2, %xmm3
#pshufb %mm1, %mm2
pshufb %xmm1, %xmm2
#pshufb %xmm1, %xmm2
#vpshufb %xmm1, %xmm2, %xmm3
pshufd $0x2d, %xmm1, %xmm2
pshufd $0xe1, %xmm1, %xmm2
vpshufd $0x59, %xmm1, %xmm2
#pshufd $0xe1, %xmm1, %xmm2
#vpshufd $0x59, %xmm1, %xmm2
pshufhw $0x2d, %xmm1, %xmm2
pshufhw $0xe1, %xmm1, %xmm2
vpshufhw $0x59, %xmm1, %xmm2
#vmovd %xmm5, %ebx
......
......@@ -1503,9 +1503,7 @@ end
val sem-pshufb x = sem-pshufb-vpshufb-opnd '0' x.opnd1 x.opnd1 x.opnd2
val sem-vpshufb x = sem-pshufb-vpshufb-opnd '1' x.opnd1 x.opnd2 x.opnd3
val sem-pshufd-vpshufd avx-encoded x = do
element-size <- return 32;
val sem-pshuf-vdhw avx-encoded element-size base-size x = do
size <- sizeof1 x.opnd1;
src <- read size x.opnd2;
dst <- lval size x.opnd1;
......@@ -1513,11 +1511,6 @@ val sem-pshufd-vpshufd avx-encoded x = do
temp-src <- mktemp;
mov size temp-src src;
#index <- return (zx ((
# case opnd4 of
# IMM8 x: x
# end
#) and '00000011'));
indices <- return (
case x.opnd3 of
IMM8 x: x
......@@ -1525,10 +1518,17 @@ val sem-pshufd-vpshufd avx-encoded x = do
);
temp-dst <- mktemp;
if base-size > 0 then
mov base-size temp-dst (var temp-src)
else
return void
;
temp <- mktemp;
let
val m i = do
offset <- return (element-size*i);
offset <- return (element-size*i + base-size);
mask <- return (
case i of
......@@ -1572,15 +1572,18 @@ val sem-pshufd-vpshufd avx-encoded x = do
end
));
mov element-size (at-offset temp-dst offset) (var (at-offset temp-src index))
mov element-size (at-offset temp-dst offset) (var (at-offset temp-src (index + base-size)))
end
in
vector-apply size element-size m
vector-apply (size - base-size) element-size m
end;
write-extend avx-encoded size dst (var temp-dst)
end
val sem-pshufd-vpshufd avx-encoded x = sem-pshuf-vdhw avx-encoded 32 0 x
val sem-pshufhw-vpshufhw avx-encoded x = sem-pshuf-vdhw avx-encoded 16 64 x
val ps-push opnd-sz opnd = do
mode64 <- mode64?;
stack-addr-sz <- runtime-stack-address-size;
......
......@@ -1416,7 +1416,7 @@ val semantics insn =
| PSADBW x: sem-psadbw x
| PSHUFB x: sem-pshufb x
| PSHUFD x: sem-pshufd-vpshufd '0' x
| PSHUFHW x: sem-undef-arity3 x
| PSHUFHW x: sem-pshufhw-vpshufhw '0' x
| PSHUFLW x: sem-undef-arity3 x
| PSHUFW x: sem-undef-arity3 x
| PSIGNB x: sem-undef-arity2 x
......@@ -2045,7 +2045,10 @@ val semantics insn =
case v of
VA3 x: sem-pshufd-vpshufd '1' x
end
| VPSHUFHW x: sem-undef-varity x
| VPSHUFHW v:
case v of
VA3 x: sem-pshufhw-vpshufhw '1' x
end
| VPSHUFLW x: sem-undef-varity x
| VPSIGNB x: sem-undef-varity x
| VPSIGND x: sem-undef-varity x
......
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