Commit 3088b850 authored by Julian Kranz's avatar Julian Kranz

X86 RREIL Translator

- Added semantics of: (V)MASKMOVDQU
parent eb2fc1da
...@@ -505,7 +505,7 @@ val show/instruction insn = ...@@ -505,7 +505,7 @@ val show/instruction insn =
| LSL x: "LSL" -++ show/arity2 x | LSL x: "LSL" -++ show/arity2 x
| LSS x: "LSS" -++ show/arity2 x | LSS x: "LSS" -++ show/arity2 x
| LTR x: "LTR" -++ show/arity1 x | LTR x: "LTR" -++ show/arity1 x
| MASKMOVDQU x: "MASKMOVDQU" -++ show/arity2 x | MASKMOVDQU x: "MASKMOVDQU" -++ show/arity3 x
| MASKMOVQ x: "MASKMOVQ" -++ show/arity2 x | MASKMOVQ x: "MASKMOVQ" -++ show/arity2 x
| MAXPD x: "MAXPD" -++ show/arity2 x | MAXPD x: "MAXPD" -++ show/arity2 x
| MAXPS x: "MAXPS" -++ show/arity2 x | MAXPS x: "MAXPS" -++ show/arity2 x
......
## M>> ## M>>
val sem-maskmovdqu-vmaskmovdqu x = do
size <- return 128;
src <- read size x.opnd1;
mask <- read size x.opnd2;
src-temp <- mktemp;
mov size src-temp src;
mask-temp <- mktemp;
mov size mask-temp mask;
byte-size <- return 8;
let
val f i = do
_if (/d (var (at-offset mask-temp ((i + 1)*8 - 1)))) _then do
dst <- write-offset byte-size x.opnd3 i;
commit byte-size dst (var (at-offset src-temp (i*8)))
end;
if (i < 15) then
f (i + 1)
else
return void
end
in
f 0
end
# _if (/d (var (at-offset mask-temp 7))) _then do
# dst <- write-offset byte-size x.opnd3 0;
# commit byte-size dst (var (at-offset src-temp 0))
# end;
# _if (/d (var (at-offset mask-temp 15))) _then do
# dst <- write-offset byte-size x.opnd3 1;
# commit byte-size dst (var (at-offset src-temp 8))
# end;
# _if (/d (var (at-offset mask-temp 23))) _then do
# dst <- write-offset byte-size x.opnd3 2;
# commit byte-size dst (var (at-offset src-temp 16))
# end;
# _if (/d (var (at-offset mask-temp 31))) _then do
# dst <- write-offset byte-size x.opnd3 3;
# commit byte-size dst (var (at-offset src-temp 24))
# end;
# _if (/d (var (at-offset mask-temp 39))) _then do
# dst <- write-offset byte-size x.opnd3 4;
# commit byte-size dst (var (at-offset src-temp 32))
# end;
# _if (/d (var (at-offset mask-temp 47))) _then do
# dst <- write-offset byte-size x.opnd3 5;
# commit byte-size dst (var (at-offset src-temp 40))
# end;
# _if (/d (var (at-offset mask-temp 55))) _then do
# dst <- write-offset byte-size x.opnd3 6;
# commit byte-size dst (var (at-offset src-temp 48))
# end;
# _if (/d (var (at-offset mask-temp 63))) _then do
# dst <- write-offset byte-size x.opnd3 7;
# commit byte-size dst (var (at-offset src-temp 56))
# end;
# _if (/d (var (at-offset mask-temp 71))) _then do
# dst <- write-offset byte-size x.opnd3 8;
# commit byte-size dst (var (at-offset src-temp 64))
# end;
# _if (/d (var (at-offset mask-temp 79))) _then do
# dst <- write-offset byte-size x.opnd3 9;
# commit byte-size dst (var (at-offset src-temp 72))
# end;
# _if (/d (var (at-offset mask-temp 87))) _then do
# dst <- write-offset byte-size x.opnd3 10;
# commit byte-size dst (var (at-offset src-temp 80))
# end;
# _if (/d (var (at-offset mask-temp 95))) _then do
# dst <- write-offset byte-size x.opnd3 11;
# commit byte-size dst (var (at-offset src-temp 88))
# end;
# _if (/d (var (at-offset mask-temp 103))) _then do
# dst <- write-offset byte-size x.opnd3 12;
# commit byte-size dst (var (at-offset src-temp 96))
# end;
# _if (/d (var (at-offset mask-temp 111))) _then do
# dst <- write-offset byte-size x.opnd3 13;
# commit byte-size dst (var (at-offset src-temp 104))
# end;
# _if (/d (var (at-offset mask-temp 119))) _then do
# dst <- write-offset byte-size x.opnd3 14;
# commit byte-size dst (var (at-offset src-temp 112))
# end;
# _if (/d (var (at-offset mask-temp 127))) _then do
# dst <- write-offset byte-size x.opnd3 15;
# commit byte-size dst (var (at-offset src-temp 120))
# end
end
val sem-mov x = do val sem-mov x = do
sz <- sizeof2 x.opnd1 x.opnd2; sz <- sizeof2 x.opnd1 x.opnd2;
a <- write sz x.opnd1; a <- write sz x.opnd1;
......
...@@ -239,13 +239,15 @@ val relative target = ...@@ -239,13 +239,15 @@ val relative target =
val absolute target = not (relative target) val absolute target = not (relative target)
#Todo: MEM => byte offset, REG => bit offset... confusing (division?)
val write-offset sz x offset = val write-offset sz x offset =
case x of case x of
MEM x: MEM x:
do do
#Todo: Offset for memory operands? #Offset for memory operands? => Add offset to pointer
address <- conv-with Signed x.psz x.opnd; address <- conv-with Signed x.psz x.opnd;
return (SEM_WRITE_MEM{size=x.psz,address=address,segment=x.segment}) combined <- return (SEM_LIN_ADD{opnd1=address,opnd2=SEM_LIN_IMM {imm=offset}});
return (SEM_WRITE_MEM{size=x.psz,address=combined,segment=x.segment})
end end
| REG x: | REG x:
do do
...@@ -996,7 +998,7 @@ val semantics insn = ...@@ -996,7 +998,7 @@ val semantics insn =
| LSL x: sem-undef-arity2 x | LSL x: sem-undef-arity2 x
| LSS x: sem-lds-les-lfs-lgs-lss x SS | LSS x: sem-lds-les-lfs-lgs-lss x SS
| LTR x: sem-undef-arity1 x | LTR x: sem-undef-arity1 x
| MASKMOVDQU x: sem-undef-arity2 x | MASKMOVDQU x: sem-maskmovdqu-vmaskmovdqu x
| MASKMOVQ x: sem-undef-arity2 x | MASKMOVQ x: sem-undef-arity2 x
| MAXPD x: sem-undef-arity2 x | MAXPD x: sem-undef-arity2 x
| MAXPS x: sem-undef-arity2 x | MAXPS x: sem-undef-arity2 x
...@@ -1377,7 +1379,10 @@ val semantics insn = ...@@ -1377,7 +1379,10 @@ val semantics insn =
| VINSERTPS x: sem-undef-varity x | VINSERTPS x: sem-undef-varity x
| VLDDQU x: sem-undef-varity x | VLDDQU x: sem-undef-varity x
| VLDMXCSR x: sem-undef-varity x | VLDMXCSR x: sem-undef-varity x
| VMASKMOVDQU x: sem-undef-varity x | VMASKMOVDQU v:
case v of
VA3 x: sem-maskmovdqu-vmaskmovdqu x
end
| VMASKMOVPD x: sem-undef-varity x | VMASKMOVPD x: sem-undef-varity x
| VMASKMOVPS x: sem-undef-varity x | VMASKMOVPS x: sem-undef-varity x
| VMAXPD x: sem-undef-varity x | VMAXPD x: sem-undef-varity x
......
...@@ -880,7 +880,7 @@ type insn = ...@@ -880,7 +880,7 @@ type insn =
| LSL of arity2 | LSL of arity2
| LSS of arity2 | LSS of arity2
| LTR of arity1 | LTR of arity1
| MASKMOVDQU of arity2 | MASKMOVDQU of arity3
| MASKMOVQ of arity2 | MASKMOVQ of arity2
| MAXPD of arity2 | MAXPD of arity2
| MAXPS of arity2 | MAXPS of arity2
...@@ -2204,6 +2204,18 @@ val m/default/si/esi/rsi size = do ...@@ -2204,6 +2204,18 @@ val m/default/si/esi/rsi size = do
end end
end end
val m/default/di/edi/rdi size = do
size <- size;
update@{ptrty=size};
addrsz <- address-size;
update@{ptrsz=addrsz};
case addrsz of
16: mem (REG DI)
| 32: mem (REG EDI)
| 64: mem (REG RDI)
end
end
val m/es/di/edi/rdi size = do val m/es/di/edi/rdi size = do
update @{segment=SEG_OVERRIDE ES}; update @{segment=SEG_OVERRIDE ES};
size <- size; size <- size;
...@@ -3816,8 +3828,9 @@ val / [0x0f 0x00 /3] = unop LTR r/m16 ...@@ -3816,8 +3828,9 @@ val / [0x0f 0x00 /3] = unop LTR r/m16
### MASKMOVDQU ### MASKMOVDQU
### - Store Selected Bytes of Double Quadword ### - Store Selected Bytes of Double Quadword
val /66 [0x0f 0xf7 /r] = binop MASKMOVDQU xmm128 xmm/reg128 val /66 [0x0f 0xf7 /r] = ternop MASKMOVDQU xmm128 xmm/reg128 (m/default/di/edi/rdi (return 8))
val /vex/66/0f/vexv [0xf7 /r-reg] | vex128? = varity2 VMASKMOVDQU xmm128 xmm/m128 val /vex/66/0f/vexv [0xf7 /r-reg] | vex128? = varity3 VMASKMOVDQU xmm128 xmm/m128 (m/default/di/edi/rdi (return 8))
### MASKMOVQ ### MASKMOVQ
### - Store Selected Bytes of Quadword ### - Store Selected Bytes of Quadword
......
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