Commit 178f4523 authored by Julian Kranz's avatar Julian Kranz

Merge branch 'master' of versioncontrolseidl.in.tum.de:gesselbe/gdsl-toolkit into no_scoping

parents b9d20dde 8ae3fe98
......@@ -129,7 +129,7 @@ GDSLC_SML_FILES = \
JAR=jgdsl.jar
GDSLC_DEP = detail/codegen/c1/runtime.c detail/codegen/c1/runtime.h
GDSLFLAGS = --runtime=$(srcdir)/detail/codegen @EXTRA_GDSL_FLAGS@
GDSLFLAGS = --runtime=$(srcdir)/detail/codegen --maxIter=42 @EXTRA_GDSL_FLAGS@
if HAVE_MLTON
......@@ -204,17 +204,39 @@ GDSL_AVRSEM = \
$(srcdir)/specifications/avr/avr-rreil-pretty.ml \
$(srcdir)/specifications/avr/avr-liveness.ml
GDSL_MIPS = \
GDSL_MIPS5 = \
$(srcdir)/specifications/mips/mips.ml \
$(srcdir)/specifications/mips/mips-asm.ml \
$(srcdir)/specifications/mips/mips-traverse.ml \
$(srcdir)/specifications/mips/mips-pretty.ml
$(srcdir)/specifications/mips/mips-pretty.ml \
$(srcdir)/specifications/mips/mips_r5.ml \
$(srcdir)/specifications/mips/mips-asm_r5.ml \
$(srcdir)/specifications/mips/mips-traverse_r5.ml \
$(srcdir)/specifications/mips/mips-pretty_r5.ml
GDSL_MIPSSEM = \
GDSL_MIPS5SEM = \
$(srcdir)/specifications/mips/mips-rreil-translator.ml \
$(srcdir)/specifications/mips/mips-rreil-registermapping.ml \
$(srcdir)/specifications/mips/mips-rreil-pretty.ml \
$(srcdir)/specifications/mips/mips-liveness.ml
$(srcdir)/specifications/mips/mips-liveness.ml \
$(srcdir)/specifications/mips/mips-rreil-translator_r5.ml
GDSL_MIPS6 = \
$(srcdir)/specifications/mips/mips.ml \
$(srcdir)/specifications/mips/mips-asm.ml \
$(srcdir)/specifications/mips/mips-traverse.ml \
$(srcdir)/specifications/mips/mips-pretty.ml \
$(srcdir)/specifications/mips/mips_r6.ml \
$(srcdir)/specifications/mips/mips-asm_r6.ml \
$(srcdir)/specifications/mips/mips-traverse_r6.ml \
$(srcdir)/specifications/mips/mips-pretty_r6.ml
GDSL_MIPS6SEM = \
$(srcdir)/specifications/mips/mips-rreil-translator.ml \
$(srcdir)/specifications/mips/mips-rreil-registermapping.ml \
$(srcdir)/specifications/mips/mips-rreil-pretty.ml \
$(srcdir)/specifications/mips/mips-liveness.ml \
$(srcdir)/specifications/mips/mips-rreil-translator_r6.ml
GDSL_ARM7 = \
$(srcdir)/specifications/arm7/arm7.ml \
......@@ -333,50 +355,95 @@ GS_AVR = $(GDSL_BASIS) $(GDSL_ASM) $(GDSL_AVR)
gdsl-avr.c: $(GDSLC_DEP) $(GS_AVR)
$(GDSLC) -o $(basename $@) $(GDSLFLAGS) $(GS_AVR)
if MIPS_RREIL
lib_LTLIBRARIES += libgdsl-mips-rreil.la
#libjgdsl_la_LIBADD += libgdsl-mips-rreil.la
#semantics_opt_LDADD += libgdsl-mips-rreil.la
nodist_include_HEADERS += gdsl-mips-rreil.h
CLEANFILES += gdsl-mips-rreil.c gdsl-mips-rreil.h
if MIPS5_RREIL
lib_LTLIBRARIES += libgdsl-mips5-rreil.la
#libjgdsl_la_LIBADD += libgdsl-mips5-rreil.la
#semantics_opt_LDADD += libgdsl-mips5-rreil.la
nodist_include_HEADERS += gdsl-mips5-rreil.h
CLEANFILES += gdsl-mips5-rreil.c gdsl-mips5-rreil.h
if INSTALL_AUXBINS
bin_PROGRAMS += gdsl-mips5-rreil-demo
endif
if BUILD_AUXBINS
noinst_PROGRAMS += gdsl-mips5-rreil-demo
endif
endif
libgdsl_mips5_rreil_la_SOURCES =
nodist_libgdsl_mips5_rreil_la_SOURCES = gdsl-mips5-rreil.c
libgdsl_mips5_rreil_la_DEPENDENCIES = $(GDSLC_DEP)
gdsl_mips5_rreil_demo_SOURCES = gdsl-mips5-rreil.c
gdsl_mips5_rreil_demo_CFLAGS = -std=c99 -DWITHMAIN
GS_MIPS5_RREIL = $(GDSL_BASIS) $(GDSL_ASM) $(GDSL_MIPS5) $(GDSL_RREIL) $(GDSL_MIPS5SEM)
gdsl-mips5-rreil.c: $(GDSLC_DEP) $(GS_MIPS5_RREIL)
$(GDSLC) -o $(basename $@) $(GDSLFLAGS) $(GS_MIPS5_RREIL)
if MIPS5
lib_LTLIBRARIES += libgdsl-mips5.la
#decoder_cli_LDADD += libgdsl-mips5.la
nodist_include_HEADERS += gdsl-mips5.h
CLEANFILES += gdsl-mips5.c gdsl-mips5.h
if INSTALL_AUXBINS
bin_PROGRAMS += gdsl-mips5-demo
endif
if BUILD_AUXBINS
noinst_PROGRAMS += gdsl-mips5-demo
endif
endif
libgdsl_mips5_la_SOURCES =
nodist_libgdsl_mips5_la_SOURCES = gdsl-mips5.c
libgdsl_mips5_la_DEPENDENCIES = $(GDSLC_DEP)
gdsl_mips5_demo_SOURCES = gdsl-mips5.c
gdsl_mips5_demo_CFLAGS = -std=c99 -DWITHMAIN
GS_MIPS5 = $(GDSL_BASIS) $(GDSL_ASM) $(GDSL_MIPS5)
gdsl-mips5.c: $(GDSLC_DEP) $(GS_MIPS5)
$(GDSLC) -o $(basename $@) $(GDSLFLAGS) $(GS_MIPS5)
if MIPS6_RREIL
lib_LTLIBRARIES += libgdsl-mips6-rreil.la
#libjgdsl_la_LIBADD += libgdsl-mips6-rreil.la
#semantics_opt_LDADD += libgdsl-mips6-rreil.la
nodist_include_HEADERS += gdsl-mips6-rreil.h
CLEANFILES += gdsl-mips6-rreil.c gdsl-mips6-rreil.h
if INSTALL_AUXBINS
bin_PROGRAMS += gdsl-mips-rreil-demo
bin_PROGRAMS += gdsl-mips6-rreil-demo
endif
if BUILD_AUXBINS
noinst_PROGRAMS += gdsl-mips-rreil-demo
noinst_PROGRAMS += gdsl-mips6-rreil-demo
endif
endif
libgdsl_mips_rreil_la_SOURCES =
nodist_libgdsl_mips_rreil_la_SOURCES = gdsl-mips-rreil.c
libgdsl_mips_rreil_la_DEPENDENCIES = $(GDSLC_DEP)
gdsl_mips_rreil_demo_SOURCES = gdsl-mips-rreil.c
gdsl_mips_rreil_demo_CFLAGS = -std=c99 -DWITHMAIN
libgdsl_mips6_rreil_la_SOURCES =
nodist_libgdsl_mips6_rreil_la_SOURCES = gdsl-mips6-rreil.c
libgdsl_mips6_rreil_la_DEPENDENCIES = $(GDSLC_DEP)
gdsl_mips6_rreil_demo_SOURCES = gdsl-mips6-rreil.c
gdsl_mips6_rreil_demo_CFLAGS = -std=c99 -DWITHMAIN
GS_MIPS_RREIL = $(GDSL_BASIS) $(GDSL_ASM) $(GDSL_MIPS) $(GDSL_RREIL) $(GDSL_MIPSSEM)
gdsl-mips-rreil.c: $(GDSLC_DEP) $(GS_MIPS_RREIL)
$(GDSLC) -o $(basename $@) $(GDSLFLAGS) $(GS_MIPS_RREIL)
GS_MIPS6_RREIL = $(GDSL_BASIS) $(GDSL_ASM) $(GDSL_MIPS6) $(GDSL_RREIL) $(GDSL_MIPS6SEM)
gdsl-mips6-rreil.c: $(GDSLC_DEP) $(GS_MIPS6_RREIL)
$(GDSLC) -o $(basename $@) $(GDSLFLAGS) $(GS_MIPS6_RREIL)
if MIPS
lib_LTLIBRARIES += libgdsl-mips.la
#decoder_cli_LDADD += libgdsl-mips.la
nodist_include_HEADERS += gdsl-mips.h
CLEANFILES += gdsl-mips.c gdsl-mips.h
if MIPS6
lib_LTLIBRARIES += libgdsl-mips6.la
#decoder_cli_LDADD += libgdsl-mips6.la
nodist_include_HEADERS += gdsl-mips6.h
CLEANFILES += gdsl-mips6.c gdsl-mips6.h
if INSTALL_AUXBINS
bin_PROGRAMS += gdsl-mips-demo
bin_PROGRAMS += gdsl-mips6-demo
endif
if BUILD_AUXBINS
noinst_PROGRAMS += gdsl-mips-demo
noinst_PROGRAMS += gdsl-mips6-demo
endif
endif
libgdsl_mips_la_SOURCES =
nodist_libgdsl_mips_la_SOURCES = gdsl-mips.c
libgdsl_mips_la_DEPENDENCIES = $(GDSLC_DEP)
gdsl_mips_demo_SOURCES = gdsl-mips.c
gdsl_mips_demo_CFLAGS = -std=c99 -DWITHMAIN
libgdsl_mips6_la_SOURCES =
nodist_libgdsl_mips6_la_SOURCES = gdsl-mips6.c
libgdsl_mips6_la_DEPENDENCIES = $(GDSLC_DEP)
gdsl_mips6_demo_SOURCES = gdsl-mips6.c
gdsl_mips6_demo_CFLAGS = -std=c99 -DWITHMAIN
GS_MIPS = $(GDSL_BASIS) $(GDSL_ASM) $(GDSL_MIPS)
gdsl-mips.c: $(GDSLC_DEP) $(GS_MIPS)
$(GDSLC) -o $(basename $@) $(GDSLFLAGS) $(GS_MIPS)
GS_MIPS6 = $(GDSL_BASIS) $(GDSL_ASM) $(GDSL_MIPS6)
gdsl-mips6.c: $(GDSLC_DEP) $(GS_MIPS6)
$(GDSLC) -o $(basename $@) $(GDSLFLAGS) $(GS_MIPS6)
if ARM7
lib_LTLIBRARIES += libgdsl-arm7.la
......@@ -656,9 +723,9 @@ private_headers += $(srcdir)/tools/x86-test-stats-runner/src/hash_array.h
MLLPT_LIB = $(srcdir)/detail/external/mllpt-lib/repair.sml $(srcdir)/detail/external/mllpt-lib/NJ-LICENSE $(srcdir)/detail/external/mllpt-lib/stream-pos.sml $(srcdir)/detail/external/mllpt-lib/ml-lpt-lib.cm $(srcdir)/detail/external/mllpt-lib/mllpt-lib.mlb $(srcdir)/detail/external/mllpt-lib/err-handler.sml $(srcdir)/detail/external/mllpt-lib/MLton-LICENSE $(srcdir)/detail/external/mllpt-lib/ulex-buffer.sml $(srcdir)/detail/external/mllpt-lib/ml-lpt-lib.mlb $(srcdir)/detail/external/mllpt-lib/wrapped-strm.sml $(srcdir)/detail/external/mllpt-lib/antlr-tokens-sig.sml $(srcdir)/detail/external/mllpt-lib/antlr-lexer-sig.sml $(srcdir)/detail/external/mllpt-lib/ebnf.sml
EXTRA_DIST = LICENSE $(JSOURCES_FULLPATH) $(MLLPT_LIB) $(GDSL_BASIS) $(GDSL_ASM) $(GDSL_X86) $(GDSL_RREIL) $(GDSL_X86SEM) $(GDSL_AVR) $(GDSL_AVRSEM) $(GDSL_MIPS) $(GDSL_MIPSSEM) $(GDSL_ARM7) $(private_headers) $(RUNTIME) $(srcdir)/gdsl.h $(srcdir)/gdslc.mlb $(srcdir)/gdsl.cm $(GDSLC_SML_FILES) $(srcdir)/detail/ml/smlnj/unsealed.cm build.bat
EXTRA_DIST = LICENSE $(JSOURCES_FULLPATH) $(MLLPT_LIB) $(GDSL_BASIS) $(GDSL_ASM) $(GDSL_X86) $(GDSL_RREIL) $(GDSL_X86SEM) $(GDSL_AVR) $(GDSL_AVRSEM) $(GDSL_MIPS5) $(GDSL_MIPS5SEM) $(GDSL_MIPS6) $(GDSL_MIPS6SEM) $(GDSL_ARM7) $(private_headers) $(RUNTIME) $(srcdir)/gdsl.h $(srcdir)/gdslc.mlb $(srcdir)/gdsl.cm $(GDSLC_SML_FILES) $(srcdir)/detail/ml/smlnj/unsealed.cm build.bat
WINDOWS_DISTFILES = $(GDSLC) LICENSE $(GDSL_BASIS) $(GDSL_ASM) $(GDSL_X86) $(GDSL_RREIL) $(GDSL_X86SEM) $(GDSL_AVR) $(GDSL_AVRSEM) $(GDSL_MIPS) $(GDSL_MIPSSEM) $(GDSL_ARM7) $(RUNTIME) build.bat
WINDOWS_DISTFILES = $(GDSLC) LICENSE $(GDSL_BASIS) $(GDSL_ASM) $(GDSL_X86) $(GDSL_RREIL) $(GDSL_X86SEM) $(GDSL_AVR) $(GDSL_AVRSEM) $(GDSL_MIPS5) $(GDSL_MIPS5SEM) $(GDSL_MIPS6) $(GDSL_MIPS6SEM) $(GDSL_ARM7) $(RUNTIME) build.bat
# distribution .tgz file for Windows
.PHONY: win-distdir win-dist
......
......@@ -21,7 +21,9 @@ GDSL_ASM_HL=specifications/asm/asm.ml specifications/asm/asm-pretty.ml specifica
GDSL_RREIL_HL=specifications/rreil/rreil.ml specifications/rreil/rreil-examples.ml specifications/rreil/rreil-cif.ml specifications/rreil/rreil-pretty.ml specifications/rreil/fmap.ml specifications/rreil/rreil-opt.ml specifications/rreil/rreil-translator.ml
GDSL_OPT_HL=specifications/rreil/rreil-liveness.ml specifications/rreil/rreil-forward-subst.ml specifications/rreil/forward-subst/inline.ml specifications/rreil/rreil-cleanup.ml specifications/rreil/forward-subst/substitute.ml specifications/rreil/forward-subst/substmap.ml specifications/rreil/forward-subst/simplify-expressions.ml
GDSL_MIPS_HL=specifications/mips/mips.ml specifications/mips/mips-pretty.ml specifications/mips/mips-rreil-pretty.ml specifications/mips/mips-rreil-registermapping.ml specifications/mips/mips-rreil-translator.ml specifications/mips/mips-liveness.ml specifications/mips/mips-asm.ml specifications/mips/mips-traverse.ml
GDSL_MIPS_HL_R5=specifications/mips/mips_r5.ml specifications/mips/mips-pretty_r5.ml specifications/mips/mips-rreil-translator_r5.ml specifications/mips/mips-asm_r5.ml specifications/mips/mips-traverse_r5.ml
GDSL_MIPS_HL_R6=specifications/mips/mips_r6.ml specifications/mips/mips-pretty_r6.ml specifications/mips/mips-rreil-translator_r6.ml specifications/mips/mips-asm_r6.ml specifications/mips/mips-traverse_r6.ml
GDSL_MIPS_HL=specifications/mips/mips.ml specifications/mips/mips-pretty.ml specifications/mips/mips-rreil-pretty.ml specifications/mips/mips-rreil-registermapping.ml specifications/mips/mips-rreil-translator.ml specifications/mips/mips-liveness.ml specifications/mips/mips-asm.ml specifications/mips/mips-traverse.ml $(GDSL_MIPS_HL_R6)
GDSL_MIPS_TRANS_HL=
GDSL_SOURCES=$(GDSL_BASIS_HL) $(GDSL_RREIL_HL) $(GDSL_MIPS_HL) $(GDSL_MIPS_TRANS_HL) $(GDSL_OPT_HL) $(GDSL_ASM_HL)
......
......@@ -12,7 +12,7 @@ GDSL_MEX=_manual
GDSL_COMP=$(GDSL)$(GDSL_MEX)
GDSL_EXEC=$(GDSL)c
GPREFIX=
#GDSLFLAGS=
GDSLFLAGS=--maxIter=42
#GDSL_SOURCES=$(shell find specifications/basis specifications/rreil specifications/x86 -type f -name '*.ml')
GDSL_BASIS_HL=specifications/basis/prelude.ml specifications/basis/bbtree.ml specifications/basis/tree-set.ml
......
......@@ -55,12 +55,12 @@ AM_CONDITIONAL(LINUX, test "$LINUX" = "yes")
#AM_CONDITIONAL(HAVE_JNI_H, test "$HAVE_JNI_H" != "")
dnl conditionals for the various decoders, either with or without semantics
FRONTENDS="x86 x86-rreil avr avr-rreil mips mips-rreil arm7 arm7-rreil";
FRONTENDS="x86 x86-rreil avr avr-rreil mips5 mips5-rreil mips6 mips6-rreil arm7 arm7-rreil";
AC_ARG_WITH([frontend],
[AS_HELP_STRING(
[--with-frontend=frontend],
[one of: x86 x86-rreil avr avr-rreil mips mips-rreil arm7 arm7-rreil])],
[one of: x86 x86-rreil avr avr-rreil mips5 mips5-rreil mips6 mips6-rreil arm7 arm7-rreil])],
[], [with_frontend=all])
case $with_frontend in
......@@ -78,12 +78,18 @@ case $with_frontend in
avr-rreil)
AC_DEFINE([USE_AVR_RREIL],[1],[build AVR decoder and RReil semantics])
with_frontend=avr-rreil;;
mips)
AC_DEFINE([USE_MIPS],[1],[build MIPS bare decoder])
with_frontend=mips;;
mips-rreil)
AC_DEFINE([USE_MIPS_RREIL],[1],[build MIPS decoder and RReil semantics])
with_frontend=mips-rreil;;
mips5)
AC_DEFINE([USE_MIPS5],[1],[build MIPS5 bare decoder])
with_frontend=mips5;;
mips5-rreil)
AC_DEFINE([USE_MIPS5_RREIL],[1],[build MIPS5 decoder and RReil semantics])
with_frontend=mips5-rreil;;
mips6)
AC_DEFINE([USE_MIPS6],[1],[build MIPS6 bare decoder])
with_frontend=mips6;;
mips6-rreil)
AC_DEFINE([USE_MIPS6_RREIL],[1],[build MIPS6 decoder and RReil semantics])
with_frontend=mips6-rreil;;
arm7)
AC_DEFINE([USE_ARM7],[1],[build ARM7 bare decoder])
with_frontend=arm7;;
......@@ -144,8 +150,10 @@ AM_CONDITIONAL([X86_RREIL],[test x$with_frontend = xx86-rreil -o x$with_frontend
AM_CONDITIONAL([X86],[test x$with_frontend = xx86 -o x$with_frontend = xall])
AM_CONDITIONAL([AVR_RREIL],[test x$with_frontend = xavr-rreil -o x$with_frontend = xall])
AM_CONDITIONAL([AVR],[test x$with_frontend = xavr -o x$with_frontend = xall])
AM_CONDITIONAL([MIPS_RREIL],[test x$with_frontend = xmips-rreil -o x$with_frontend = xall])
AM_CONDITIONAL([MIPS],[test x$with_frontend = xmips -o x$with_frontend = xall])
AM_CONDITIONAL([MIPS5_RREIL],[test x$with_frontend = xmips5-rreil -o x$with_frontend = xall])
AM_CONDITIONAL([MIPS5],[test x$with_frontend = xmips5 -o x$with_frontend = xall])
AM_CONDITIONAL([MIPS6_RREIL],[test x$with_frontend = xmips6-rreil -o x$with_frontend = xall])
AM_CONDITIONAL([MIPS6],[test x$with_frontend = xmips6 -o x$with_frontend = xall])
AM_CONDITIONAL([ARM7_RREIL],[test x$with_frontend = xarm7-rreil -o x$with_frontend = xall])
AM_CONDITIONAL([ARM7],[test x$with_frontend = xarm7 -o x$with_frontend = xall])
AM_CONDITIONAL([HAVE_RREIL],[test x$has_rreil = xyes -o x$with_frontend = xall])
......
......@@ -55,6 +55,7 @@ in case i of
| INSTRINDEX28 i: inner i 28
| COFUN i: inner i 25
| OP i: inner i 5
| _ : revision/generalize-immediate i
end end
val generalize-ua ua =
......
val revision/generalize-immediate i =
case 0 of
1: asm-bounded (asm-boundary-sz 1) (asm-imm 1)
end
val revision/generalize-immediate i = let
val inner i sz = asm-bounded (asm-boundary-sz sz) (asm-imm (zx i))
in case i of
IMM21 i: inner i 21
| IMM32 i: inner i 32
| BP i: inner i 2
| SA2 i: inner i 2
| OFFSET11 i: inner i 11
| OFFSET23 i: inner i 23
| OFFSET28 i: inner i 28
| C2CONDITION i: inner i 5
| CODE16 i: inner i 16
end end
export pretty : (insndata) -> rope
val pretty i = show/instruction i
val -++ a b = a +++ " " +++ b
val show/lvalue opnd =
case opnd of
GPR r: show/register r
| FPR r: show/register r
end
val show/rvalue opnd =
case opnd of
LVALUE l: show/lvalue l
| IMM imm: show/immediate imm
end
val show/immediate imm =
case imm of
IMM5 x: show-int (zx x)
| IMM16 x: show-int (zx x)
| OFFSET9 x: show-int (zx x)
| OFFSET16 x: show-int (zx x)
| SEL x: show-int (zx x)
| IMPL x: show-int (zx x)
| CODE10 x: show-int (zx x)
| CODE19 x: show-int (zx x)
| CODE20 x: show-int (zx x)
| STYPE x: show-int (zx x)
| POSSIZE x: show-int (zx x)
| SIZE x: show-int (zx x)
| POS x: show-int (zx x)
| HINT x: show-int (zx x)
| INSTRINDEX x: show-int (zx x)
| COFUN x: show-int (zx x)
| CC x: show-int (zx x)
| COND x: show-int (zx x)
| OP x: show-int (zx x)
end
val show/format format =
case format of
S : "S"
| D : "D"
| W : "W"
| L : "L"
| PS : "PS"
end
val show/register r =
case r of
ZERO: "zero"
| AT: "at"
| V0: "v0"
| V1: "v1"
| A0: "a0"
| A1: "a1"
| A2: "a2"
| A3: "a3"
| T0: "t0"
| T1: "t1"
| T2: "t2"
| T3: "t3"
| T4: "t4"
| T5: "t5"
| T6: "t6"
| T7: "t7"
| S0: "s0"
| S1: "s1"
| S2: "s2"
| S3: "s3"
| S4: "s4"
| S5: "s5"
| S6: "s6"
| S7: "s7"
| T8: "t8"
| T9: "t9"
| K0: "k0"
| K1: "k1"
| GP: "gp"
| SP: "sp"
| S8: "s8"
| RA: "ra"
| HI: "hi"
| LO: "lo"
| PC: "pc"
| F0: "f0"
| F1: "f1"
| F2: "f2"
| F3: "f3"
| F4: "f4"
| F5: "f5"
| F6: "f6"
| F7: "f7"
| F8: "f8"
| F9: "f9"
| F10: "f10"
| F11: "f11"
| F12: "f12"
| F13: "f13"
| F14: "f14"
| F15: "f15"
| F16: "f16"
| F17: "f17"
| F18: "f18"
| F19: "f19"
| F20: "f20"
| F21: "f21"
| F22: "f22"
| F23: "f23"
| F24: "f24"
| F25: "f25"
| F26: "f26"
| F27: "f27"
| F28: "f28"
| F29: "f29"
| F30: "f30"
| F31: "f31"
| FIR: "fir"
| FCCR: "fccr"
| FEXR: "fexr"
| FENR: "fenr"
| FCSR: "fcsr"
end
# -> sftl
val show/unop-src x = show/rvalue x.source
val show/unop x = show/lvalue x.destination
val show/binop-src x = show/rvalue x.source1 +++ ", " +++ show/rvalue x.source2
val show/binop-fmt x = show/lvalue x.destination +++ ", " +++ show/rvalue x.source
val show/binop x = show/lvalue x.destination +++ ", " +++ show/rvalue x.source
val show/ternop-src x = show/rvalue x.source1 +++ ", " +++ show/rvalue x.source2 +++ ", " +++ show/rvalue x.source3
val show/ternop x = show/lvalue x.destination +++ ", " +++ show/rvalue x.source1 +++ ", " +++ show/rvalue x.source2
val show/ternop-fmt x = show/lvalue x.destination +++ ", " +++ show/rvalue x.source1 +++ ", " +++ show/rvalue x.source2
val show/quadop x = show/lvalue x.destination +++ ", " +++ show/rvalue x.source1 +++ ", " +++ show/rvalue x.source2 +++ ", " +++ show/rvalue x.source3
val show/quadop-fmt x = show/lvalue x.destination +++ ", " +++ show/rvalue x.source1 +++ ", " +++ show/rvalue x.source2 +++ ", " +++ show/rvalue x.source3
val show/quadop-fmt-src x = show/rvalue x.source1 +++ ", " +++ show/rvalue x.source2 +++ ", " +++ show/rvalue x.source3 +++ ", " +++ show/rvalue x.source4
val show/instruction insn = let
val show/ua mnemonic ua = case ua of
NULLOP: mnemonic
| UNOP_SRC x: mnemonic -++ show/unop-src x
| UNOP x: mnemonic -++ show/unop x
| BINOP_SRC x: mnemonic -++ show/binop-src x
| BINOP_FMT x: mnemonic +++ "." +++ show/format x.fmt -++ show/binop-fmt x
| BINOP x: mnemonic -++ show/binop x
| TERNOP_SRC x: mnemonic -++ show/ternop-src x
| TERNOP x: mnemonic -++ show/ternop x
| TERNOP_FMT x: mnemonic +++ "." +++ show/format x.fmt -++ show/ternop-fmt x
| QUADOP x: mnemonic -++ show/quadop x
| QUADOP_FMT x: mnemonic +++ "." +++ show/format x.fmt -++ show/quadop-fmt x
| QUADOP_FMT_SRC x: mnemonic +++ "." +++ show/format x.fmt -++ show/quadop-fmt-src x
end
in
traverse show/ua insn.insn
end
# <- sutl
......@@ -88,6 +88,7 @@ val show/immediate imm =
| INSTRINDEX28 x: show-int (zx x)
| COFUN x: show-int (zx x)
| OP x: show-int (zx x)
| _ : revision/show/immediate imm
end
val show/format format =
......@@ -96,27 +97,7 @@ val show/format format =
| D : "D"
| W : "W"
| L : "L"
| PS : "PS"
end
val show/condop cond =
case cond of
C_F: "F"
| C_UN: "UN"
| C_EQ: "EQ"
| C_UEQ: "UEQ"
| C_OLT: "OLT"
| C_ULT: "ULT"
| C_OLE: "OLE"
| C_ULE: "ULE"
| C_SF: "SF"
| C_NGLE: "NGLE"
| C_SEQ: "SEQ"
| C_NGL: "NGL"
| C_LT: "LT"
| C_NGE: "NGE"
| C_LE: "LE"
| C_NGT: "NGT"
| _ : revision/show/format format
end
val show/fccode fcc =
......
val show/condop cond =
case cond of
C_F: "F"
| C_UN: "UN"
| C_EQ: "EQ"
| C_UEQ: "UEQ"
| C_OLT: "OLT"
| C_ULT: "ULT"
| C_OLE: "OLE"
| C_ULE: "ULE"
| C_SF: "SF"
| C_NGLE: "NGLE"
| C_SEQ: "SEQ"
| C_NGL: "NGL"
| C_LT: "LT"
| C_NGE: "NGE"
| C_LE: "LE"
| C_NGT: "NGT"
end
val revision/show/immediate imm =
case 0 of
1 : "ERROR"
end
val revision/show/format format =
case format of
PS : "PS"
end
val show/condop cond =
case cond of
C_AF: "AF"
| C_UN: "UN"
| C_EQ: "EQ"
| C_UEQ: "UEQ"
| C_LT: "LT"
| C_ULT: "ULT"
| C_LE: "LE"
| C_ULE: "ULE"
| C_SAF: "SAF"
| C_SUN: "SUN"
| C_SEQ: "SEQ"
| C_SUEQ: "SUEQ"
| C_SLT: "SLT"
| C_SULT: "SULT"
| C_SLE: "SLE"
| C_SULE: "SULE"
| C_AT: "AT"
| C_OR: "OR"
| C_UNE: "UNE"
| C_NE: "NE"
| C_UGE: "UGE"
| C_OGE: "OGE"
| C_UGT: "UGT"
| C_OGT: "OGT"
| C_SAT: "SAT"
| C_SOR: "SOR"
| C_SUNE: "SUNE"
| C_SNE: "SNE"
| C_SUGE: "SUGE"
| C_SOGE: "SOGE"
| C_SUGT: "SUGT"
| C_SOGT: "SOGT"
end
val revision/show/immediate imm =
case imm of
IMM21 x: show-int (zx x)
| IMM32 x: show-int (zx x)
| BP x: show-int (zx x)
| SA2 x: show-int (zx x)
| OFFSET11 x: show-int (zx x)
| OFFSET23 x: show-int (zx x)
| OFFSET28 x: show-int (zx x)
| C2CONDITION x: show-int (zx x)
| CODE16 x: show-int (zx x)
end
val revision/show/format format =
case 0 of
1: "ERROR"
end
This diff is collapsed.
val revision/sizeof-imm imm =
case imm of
IMM21 i: 21
| IMM32 i: 32
| BP i: 2
| SA2 i: 2
| OFFSET11 i: 11
| OFFSET23 i: 23
| OFFSET28 i: 28
| C2CONDITION i: 5
| CODE16 i: 16
end
val revision/rval-imm sn x = let
val from-vec sn vec =
case sn of
Signed: SEM_LIN_IMM {const=sx vec}
| Unsigned: SEM_LIN_IMM {const=zx vec}
end
in
case x of
IMM21 i: from-vec sn i
| IMM32 i: from-vec sn i
| BP i: from-vec sn i
| SA2 i: from-vec sn i
| OFFSET11 i: from-vec sn i
| OFFSET23 i: from-vec sn i
| OFFSET28 i: from-vec sn i
| C2CONDITION i: from-vec sn i
| CODE16 i: from-vec sn i
end
end
val sem-addiupc x = do
im <- rval Signed x.op2;
size <- return (sizeof-lval x.op1);
pc <- return (semantic-reg-of Sem_PC);
# im already shifted at decoding
res <- mktemp;
add size res (var pc) im;
write x.op1 (var res)
end
val sem-align x = do
rs <- rval Unsigned x.op2;
rt <- rval Unsigned x.op3;
bp_op <- rval Unsigned x.op4;
size <- return (sizeof-rval x.op2);
bp <- return (lin-to-int bp_op);
left <- mktemp;
right <- mktemp;
shl size left rt (imm (8 * bp));
shr size right rs (imm (8 * (4 - bp)));
res <- mktemp;
orb size res (var left) (var right);
write x.op1 (var res)
end
val sem-aluipc x = do
im <- rval Signed x.op2;
size <- return (sizeof-lval x.op1);
pc <- return (semantic-reg-of Sem_PC);
# im already shifted at decoding
temp <- mktemp;
add size temp (var pc) im;
res <- mktemp;
mov size res (imm 0);
mov (size - 16) res (var (at-offset temp 16));
write x.op1 (var res)
end
val sem-aui x = do
rs <- rval Signed x.op2;
im <- rval Signed x.op3;
size <- return (sizeof-rval x.op2);
# im already bitshifted at decoding
res <- mktemp;
add size res rs im;
write x.op1 (var res)
end
val sem-auipc x = do
im <- rval Signed x.op2;
size <- return (sizeof-lval x.op1);
pc <- return (semantic-reg-of Sem_PC);
# im already bitshifted at decoding
res <- mktemp;
add size res (var pc) im;
write x.op1 (var res)
end
val sem-balc x = do
pc <- return (semantic-reg-of Sem_PC);
ra <- return (semantic-gpr-of RA);
# pc got incremented already => add 0 instead of 4
add ra.size ra (var pc) (imm 0);
sem-bc x
end
val sem-bc x = do
# offset already shifted at decoding
off <- rval Signed x.op;
size <- return (sizeof-rval x.op);
cbranch-rel (imm 1) off
end
val sem-bc1 cmp_op x = do
ft <- rval Signed x.op1;
size <- return (sizeof-rval x.op1);
off <- rval Signed x.op2;
cond <- cmp_op 1 ft (imm 0);
cbranch-rel cond off
end