X86 RREIL Translator

- Added semantics of: LDDQU
- Cleanup

CFGresolve/CFGresolve/RReil.cpp

@@ -289,9 +289,9 @@ std::ostream& operator<<(std::ostream& o, const Op& s) {
 
 class PrintLinVisitor : public LinVisitor {
   std::ostream& o;
-  int comp = 0;
+  int comp;
 public:
-  PrintLinVisitor(std::ostream& o) : o(o) {};
+  PrintLinVisitor(std::ostream& o) : o(o), comp(0) {};
   void accept(const LinVar& l) {
     o << l.getVar();
   };

CFGresolve/CFGresolve/RReil.h

@@ -12,6 +12,7 @@
 #include <iostream>
 #include <vector>
 #include <inttypes.h>
+#include <algorithm>
 
 class RReilBB;
 typedef char* RReilAddress;

CFGresolve/CFGresolve/Segment.cpp

@@ -9,6 +9,7 @@
 //  Copyright (c) 2012 Axel Simon. All rights reserved.
 //
 
+#include <strings.h>
 #include "Segment.h"
 #include <sys/mman.h>
 #include <unistd.h>

CFGresolve/CFGresolve/main-elf.cpp

+/*
+ * main-elf.cpp
+ *
+ *  Created on: Oct 23, 2012
+ *      Author: jucs
+ */
+
+#include <stdlib.h>
+#include <stdio.h>
+
+int main(void) {
+	printf(":-)\n");
+}

specifications/rreil/rreil.ml

@@ -174,7 +174,6 @@ val divs sz a b c = push (/ASSIGN a (SEM_DIVS{size=sz,opnd1=b,opnd2=c}))
 val shl sz a b c = push (/ASSIGN a (SEM_SHL{size=sz,opnd1=b,opnd2=c}))
 val shr sz a b c = push (/ASSIGN a (SEM_SHR{size=sz,opnd1=b,opnd2=c}))
 val shrs sz a b c = push (/ASSIGN a (SEM_SHRS{size=sz,opnd1=b,opnd2=c}))
-val bswap sz a b = push (/ASSIGN a (SEM_BSWAP{size=sz,opnd1=b}))
 val modulo sz a b c = push (/ASSIGN a (SEM_MOD{size=sz,opnd1=b,opnd2=c}))
 val movsx szA a szB b = push (/ASSIGN a (SEM_SX{size=szA,fromsize=szB,opnd1=b}))
 val movzx szA a szB b = push (/ASSIGN a (SEM_ZX{size=szA,fromsize=szB,opnd1=b}))