X86 RREIL Translator

X86 Specification

- Added semantics of: LODS/LODSB/LODSW/LODSD/LODSQ
- Bug fixes

specifications/x86/x86-pretty.ml

@@ -495,10 +495,7 @@ val show/instruction insn =
     | LLDT x: "LLDT" -++ show/arity1 x
     | LMSW x: "LMSW" -++ show/arity1 x
     | LOCK: "LOCK"
-    | LODSB: "LODSB"
-    | LODSD: "LODSD"
-    | LODSQ: "LODSQ"
-    | LODSW: "LODSW"
+    | LODS x: "LODS" -++ show/arity1 x
     | LOOP x: "LOOP" -++ show/flow1 x
     | LOOPE x: "LOOPE" -++ show/flow1 x
     | LOOPNE x: "LOOPNE" -++ show/flow1 x

specifications/x86/x86-rreil-translator.ml

@@ -184,8 +184,8 @@ val conv-with conv sz x =
            do
 	     t <- mktemp;
              address <- conv-mem x;
-             segmented-load sz t x.psz address x.segment;
-             return (var t)
+             segmented-load x.sz t x.psz address x.segment;
+             expand conv (var t) x.sz sz
            end
       end
    end
@@ -1101,6 +1101,10 @@ val sem-lahf = do
   mov ah.size ah (var flags)
 end
 
+val sem-lar x = do
+  sem-undef-arity2
+end
+
 val sem-lea x = do
   opnd-sz <- sizeof1 x.opnd1;
   dst <- write opnd-sz x.opnd1;
@@ -1118,6 +1122,22 @@ val sem-lea x = do
   commit opnd-sz dst (var temp)
 end
 
+val sem-lods x = do
+  sz <- sizeof1 x.opnd1;
+  src <- read sz x.opnd1;
+
+  dst <- return (semantic-register-of(
+    case sz of
+       8: AL
+     | 16: AX
+     | 32: EAX
+     | 64: RAX
+    end
+  ));
+
+  mov dst.size dst src
+end
+
 ## M>>
 
 val sem-mov x = do
@@ -2076,10 +2096,7 @@ val semantics insn =
    | LLDT x: sem-undef-arity1 x
    | LMSW x: sem-undef-arity1 x
    | LOCK x: sem-undef-arity0 x
-   | LODSB x: sem-undef-arity0 x
-   | LODSD x: sem-undef-arity0 x
-   | LODSQ x: sem-undef-arity0 x
-   | LODSW x: sem-undef-arity0 x
+   | LODS x: sem-lods x
    | LOOP x: sem-undef-flow1 x
    | LOOPE x: sem-undef-flow1 x
    | LOOPNE x: sem-undef-flow1 x

specifications/x86/x86.ml

@@ -864,10 +864,7 @@ type insn =
  | LLDT of arity1
  | LMSW of arity1
  | LOCK of arity0
- | LODSB of arity0
- | LODSD of arity0
- | LODSQ of arity0
- | LODSW of arity0
+ | LODS of arity1
  | LOOP of flow1
  | LOOPE of flow1
  | LOOPNE of flow1
@@ -2187,9 +2184,9 @@ val mm64 = r/rexb mm-rex
 val xmm128 = r/rexr xmm-rex
 val ymm256 = r/rexr ymm-rex
 
-val m/default/si/esi/rsi = do
-  opndsz <- operand-size;
-  update@{ptrty=opndsz};
+val m/default/si/esi/rsi size = do
+  size <- size;
+  update@{ptrty=size};
   addrsz <- address-size;
   update@{ptrsz=addrsz};
   case addrsz of
@@ -2199,16 +2196,16 @@ val m/default/si/esi/rsi = do
   end
 end
 
-val m/es/si/esi/rsi = do
+val m/es/di/edi/rdi size = do
   update @{segment=SEG_OVERRIDE ES};
-  opndsz <- operand-size;
-  update@{ptrty=opndsz};
+  size <- size;
+  update@{ptrty=size};
   addrsz <- address-size;
   update@{ptrsz=addrsz};
   case addrsz of
-     16: mem (REG SI)
-   | 32: mem (REG ESI)
-   | 64: mem (REG RSI)
+     16: mem (REG DI)
+   | 32: mem (REG EDI)
+   | 64: mem (REG RDI)
   end
 end
 
@@ -2825,11 +2822,11 @@ val /vex/0f/vexv [0xc2 /r]
 
 ### CMPS/CMPSB/CMPSW/CMPSD/CMPSQ
 ###  - Compare String Operands
-val / [0xa6] = binop CMPS m/default/si/esi/rsi m/es/si/esi/rsi
+val / [0xa6] = binop CMPS (m/default/si/esi/rsi (return 8)) (m/es/di/edi/rdi (return 8))
 val / [0xa7]
- | opndsz? = binop CMPS m/default/si/esi/rsi m/es/si/esi/rsi
- | rexw? = binop CMPS m/default/si/esi/rsi m/es/si/esi/rsi
- | otherwise = binop CMPS m/default/si/esi/rsi m/es/si/esi/rsi
+ | opndsz? = binop CMPS (m/default/si/esi/rsi operand-size) (m/es/di/edi/rdi operand-size)
+ | rexw? = binop CMPS (m/default/si/esi/rsi operand-size) (m/es/di/edi/rdi operand-size) 
+ | otherwise = binop CMPS (m/default/si/esi/rsi operand-size) (m/es/di/edi/rdi operand-size)
 
 ### CMPSD
 ###  - Compare Scalar Double-Precision Floating-Point Values
@@ -3735,11 +3732,11 @@ val / [0xf0] = arity0 LOCK
 
 ### LODS/LODSB/LODSW/LODSD/LODSQ
 ###  - Load String
-val / [0xac] = arity0 LODSB
+val / [0xac] = unop LODS (m/default/si/esi/rsi (return 8))
 val / [0xad]
- | opndsz? = arity0 LODSW
- | rexw? = arity0 LODSQ
- | otherwise = arity0 LODSD
+ | opndsz? = unop LODS (m/default/si/esi/rsi (return 8))
+ | rexw? = unop LODS (m/default/si/esi/rsi (return 8))
+ | otherwise = unop LODS (m/default/si/esi/rsi (return 8))
 
 ### LOOP/LOOPcc
 ###  - Loop According to ECX Counter