Commit 06098a13 authored by Julian Kranz's avatar Julian Kranz

X86 RREIL Translator

- Finished to add semantics of: (V)PSHUFB
parent 74330dc0
......@@ -351,9 +351,13 @@ main:
#por %xmm1, %xmm2
#vpor %xmm1, %xmm2, %xmm3
psadbw %mm1, %mm2
psadbw %xmm1, %xmm2
vpsadbw %xmm1, %xmm2, %xmm3
#psadbw %mm1, %mm2
#psadbw %xmm1, %xmm2
#vpsadbw %xmm1, %xmm2, %xmm3
pshufb %mm1, %mm2
pshufb %xmm1, %xmm2
vpshufb %xmm1, %xmm2, %xmm3
#vmovd %xmm5, %ebx
......
......@@ -1467,22 +1467,42 @@ val sem-psadbw x = sem-psadbw-vpsadbw-opnd '0' x.opnd1 x.opnd1 x.opnd2
val sem-vpsadbw x = sem-psadbw-vpsadbw-opnd '1' x.opnd1 x.opnd2 x.opnd3
val sem-pshufb-vpshufb-opnd avx-encoded opnd1 opnd2 opnd3 = do
#size <- sizeof1 opnd1;
#src <- read size opnd2;
#shuffle-control-mask <- read size opnd3;
#dst <- lval size opnd1;
element-size <- return 8;
#temp-scm <- mktemp;
#=> For each index: mov (logb (divb size 8)) temp-scm shuffle-control-mask;
#movzx temp-scm to some size?!
size <- sizeof1 opnd1;
src <- read size opnd2;
shuffle-control-mask <- read size opnd3;
dst <- lval size opnd1;
#temp-src2 <- mktemp;
#mov size temp-src2 src2;
temp-scm <- mktemp;
mov size temp-scm shuffle-control-mask;
index <- mktemp;
#temp-dst <- mktemp
return void
temp-dst <- mktemp;
temp <- mktemp;
let
val m i = do
offset <- return (element-size*i);
_if (/d (var (at-offset temp-scm (offset + 7)))) _then
mov element-size (at-offset temp-dst offset) (imm 0)
_else do
movzx size index (logb (divb size 8)) (var (at-offset temp-scm offset));
mul size index (var index) (imm 8);
shr size temp src (var index);
mov element-size (at-offset temp-dst offset) (var temp)
end
end
in
vector-apply size element-size m
end;
write-extend avx-encoded size dst (var temp-dst)
end
val sem-pshufb x = sem-pshufb-vpshufb-opnd '0' x.opnd1 x.opnd1 x.opnd2
val sem-vpshufb x = sem-pshufb-vpshufb-opnd '1' x.opnd1 x.opnd2 x.opnd3
val ps-push opnd-sz opnd = do
mode64 <- mode64?;
stack-addr-sz <- runtime-stack-address-size;
......
......@@ -1408,7 +1408,7 @@ val semantics insn =
| PREFETCHT2 x: sem-undef-arity1 x
| PREFETCHW x: sem-undef-arity1 x
| PSADBW x: sem-psadbw x
| PSHUFB x: sem-undef-arity2 x
| PSHUFB x: sem-pshufb x
| PSHUFD x: sem-undef-arity3 x
| PSHUFHW x: sem-undef-arity3 x
| PSHUFLW x: sem-undef-arity3 x
......@@ -2031,7 +2031,10 @@ val semantics insn =
case v of
VA3 x: sem-vpsadbw x
end
| VPSHUFB x: sem-undef-varity x
| VPSHUFB v:
case v of
VA3 x: sem-vpshufb x
end
| VPSHUFD x: sem-undef-varity x
| VPSHUFHW x: sem-undef-varity x
| VPSHUFLW x: sem-undef-varity x
......
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